LTM4608EV#PBF Linear Technology, LTM4608EV#PBF Datasheet - Page 7
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LTM4608EV#PBF
Manufacturer Part Number
LTM4608EV#PBF
Description
IC DC/DC UMODULE 8A 68-LGA
Manufacturer
Linear Technology
Series
µModuler
Type
Point of Load (POL) Non-Isolatedr
Datasheet
1.LTM4608IVPBF.pdf
(26 pages)
Specifications of LTM4608EV#PBF
Design Resources
LTM4608 Spice Model
Output
0.6 ~ 5 V
Number Of Outputs
1
Power (watts)
40W
Mounting Type
Surface Mount
Voltage - Input
2.7 ~ 5.5 V
Package / Case
68-LGA
1st Output
0.6 ~ 5 VDC @ 8A
Size / Dimension
0.59" L x 0.35" W x 0.11" H (15mm x 9mm x 2.8mm)
Power (watts) - Rated
40W
Operating Temperature
-40°C ~ 85°C
Efficiency
95%
Dc To Dc Converter Type
Step Down
Pin Count
68
Input Voltage
5.5V
Output Voltage
0.6 to 5V
Switching Freq
1.7MHz
Output Current
8A
Package Type
LGA
Output Type
Adjustable
Switching Regulator
Yes
Load Regulation
0.75%
Line Regulation
0.2%/V
Mounting
Surface Mount
Input Voltage (min)
2.375V
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-
2nd Output
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIN FUNCTIONS
V
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between V
V
Power Output Pins. Apply output load between these pins
and GND pins. Recommend placing output decoupling
capacitance directly between these pins and GND pins.
See Table 1.
GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power
Ground Pins for Both Input and Output Returns.
SV
nected to V
SGND (E1): Signal Ground Pin. Return ground path for all
analog and low power circuitry. Tie a single connection to
GND in the application.
MODE (B5): Mode Select Input. Tying this pin high enables
Burst Mode
continuous operation. Floating this pin or tying it to V
enables pulse-skipping operation.
CLKIN (B3): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with a
50k resistor. The phase-locked loop will force the internal
top power PMOS turn on to be synchronized with the
rising edge of the CLKIN signal. Connect this pin to SV
to enable spread spectrum modulation. During external
synchronization, make sure the PLLLPF pin is not tied to
V
IN
OUT
IN
IN
(C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input
or GND.
(F4): Signal Input Voltage. This pin is internally con-
(C10-C11, D10-D11, E9-E11, F9-F11, G9-G11):
IN
®
operation. Tying this pin low enables forced
through a lowpass filter.
IN
pins and GND pins.
IN
/2
IN
PLLLPF (E3): Phase-Locked Loop Lowpass Filter. An in-
ternal lowpass filter is tied to this pin. In spread spectrum
mode, placing a capacitor here to SGND controls the slew
rate from one frequency to the next. Alternatively, floating
this pin allows normal running frequency at 1.5MHz, tying
this pin to SV
normal frequency (2MHz), tying it to ground forces the
frequency to run at 0.67 times its normal frequency (1MHz).
PHMODE (B4): Phase Selector Input. This pin determines
the phase relationship between the internal oscillator and
CLKOUT. Tie it high for 2-phase operation, tie it low for
3-phase operation, and float or tie it to V
operation.
MGN (B8): Margining Pin. Increases or decreases the
output voltage by the amount specified by the BSEL pin.
To disable margining, tie the MGN pin to a voltage divider
with 50k resistors from V
Information section and Figure 20.
BSEL (B7): Margining Bit Select Pin. Tying BSEL low se-
lects ±5%, tying it high selects ±10%. Floating it or tying
it to V
TRACK (E5): Output Voltage Tracking Pin. Voltage track-
ing is enabled when the TRACK voltage is below 0.57V.
If tracking is not desired, then connect the TRACK pin to
SV
voltage needs to be below 0.18V before the chip shuts
down even though RUN is already low. Do not float this
pin. A resistor divider and capacitor can be applied to the
TRACK pin to increase the soft-start time of the regulator.
See the Applications Information section. Can tie together
for parallel operation and tracking. Load current needs to
be present during track down.
IN
. If TRACK is not tied to SV
IN
/2 selects ±15%.
IN
forces the part to run at 1.33 times its
IN
to ground. See the Applications
IN
, then the TRACK pin’s
LTM4608
IN
/2 for 4-phase
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