45111 Parallax Inc, 45111 Datasheet - Page 168

• Manufacturer Part Number: 45111
• Description: MANUAL FOR SX-KEY/BLITZ VER. 2.0
• Manufacturer: Parallax Inc

Specifications of 45111

• Accessory Type: Manual
• Product: Microcontroller Accessories
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Parallax microcontroller
• For Use With: 70002PAR - GUIDE PROG THE SX MICRO -DAUBACH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

15 Appendix E: SX Data Sheet
15.3.2 Port B Registers
There are eight registers used to configure the I/O pins of Port B. The TRIS_B register configures the
data direction of the Port B pins as input or output. The LVL_B register configures the input pins as TTL
or CMOS voltage level. The PLP_B register enables/disables pull up resistors on Port B input pins. The
ST_B register enables/disables the Schmitt-Trigger inputs on Port B input pins. The WKEN_B register
enables/disables the multi-input wake up for interrupts on Port B input pins. The WKED_B register
selects rising/falling edge detection on Port B input pins. The WKPND_B register contains the state of
the MIWU pins. The CMP_B registers configures and provides the results from the comparator pins. To
access these registers you must first write a particular value to the MODE register. Please refer to
32 – SX20/28 Mode Register to find the values required in the MODE register to access the Port B
Registers. Note: All the bits in the following registers are set to ‘1’ on power up.
15.3.2.1
A bit set to ‘1’ in this register sets the corresponding I/O port pin to input (high z) mode.
A bit set to ‘0’ in this register sets the corresponding I/O port pin to output mode.
15.3.2.2
A bit set to ‘1’ in this register sets the input level of the corresponding port pin to TTL.
A bit set to ‘0’ in this register sets the input level of the corresponding port pin to CMOS.
15.3.2.3
A bit set to ‘1’ in this register disables the weak pull-up resistor on the corresponding port pin. A bit set
to ‘0’ in this register enables the weak pull-up resistor on the corresponding port pin.
Page 168 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc.
TRIS_B – Data Direction Register
LVL_B - TTL/CMOS Select Register
PLP_B – Pull-Up Resistor Enable Register
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
7
7
7
6
6
6
5
5
5
TRIS_B
4
4
4
LVL_B
PLP_B
3
3
3
2
2
2
1
1
1
0
0
0
Table