CY3083-06 Cypress Semiconductor Corp, CY3083-06 Datasheet

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CY3083-06

Manufacturer Part Number
CY3083-06
Description
MATRIX CARD FOR HI-LO PROG
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY3083-06

Accessory Type
Matrix Card
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
CY3649 Hi-Lo Programmer
Lead Free Status / Rohs Status
Not Compliant
Features
Table 1. Frequency Table
Note
Cypress Semiconductor Corporation
Document #: 38-07413 Rev. *B
1. x = the reference input frequency, 200MHz < F
Output frequency up to 125 MHz
Supports PowerPC
12 clock outputs: frequency configurable
Configurable Output Disable
Two reference clock inputs for dynamic toggling
Oscillator or PECL reference input
VC0_SEL
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
®
, and Pentium
[1]
FB_SEL2
®
processors
VCO
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
< 480MHz.
3.3V, 125-MHz, Multi-Output Zero Delay Buffer
198 Champion Court
FB_SEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Spread spectrum compatible
Glitch-free output clocks transitioning
3.3V power supply
Pin compatible with SC973X
Industrial temperature range: –40°C to +85°C
52-Pin TQFP package
San Jose
,
FB_SEL0
CA 95134-1709
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Revised September 09, 2008
CY29976
408-943-2600
F
12x
16x
20x
12x
16x
20x
10x
10x
VCO
8x
8x
4x
6x
8x
4x
6x
8x
[+] Feedback

Related parts for CY3083-06

CY3083-06 Summary of contents

Page 1

... Note the reference input frequency, 200MHz < F VCO Cypress Semiconductor Corporation Document #: 38-07413 Rev. *B 3.3V, 125-MHz, Multi-Output Zero Delay Buffer ■ Spread spectrum compatible ■ Glitch-free output clocks transitioning ■ 3.3V power supply ■ Pin compatible with SC973X ■ Industrial temperature range: –40°C to +85°C ■ ...

Page 2

Logic Block Diagram ...

Page 3

Pin Definitions [2] Pin No. Pin Name PWR 11 PECL_CLK 12 PECL_CLK# 9 TCLK0 10 TCLK1 44, 46, 48, 50 QA(3:0) V DDC 32, 34, 36, 38 QB(3:0) V DDC 16, 18, 21, 23 QC(3:0) V DDC 29 FB_OUT V ...

Page 4

Description The CY29976 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs and an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output configurations. The PLL is ...

Page 5

SYNC Output In situations were output frequency relationships are not integer multiples of each other the SYNC output provides a signal for system synchronization. The CY29976 monitors the relationship between the QA and the QC output clocks. It provides a ...

Page 6

Power Management The individual output enable/freeze control of the CY29976 allows the user to implement unique power management schemes into the design. The outputs are stopped in the logic ‘0’ state when the freeze control bits are activated. The serial ...

Page 7

AC Parameters 3.3V ±10 DDC Parameter Description Tr/Tf TCLK Input Rise / Fall Fref Reference Input Frequency FrefDC Reference Input Duty Cycle Fvco PLL VCO Lock Range Tlock Maximum PLL lock Time Tr/Tf ...

Page 8

Package Drawing and Dimensions Figure 3. 52-Pin Thin Plastic Quad Flat Pack (10x10x1.4 mm) A52 Document #: 38-07413 Rev. *B CY29976 51-85131-** Page [+] Feedback ...

Page 9

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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