CDB2000-MB Cirrus Logic Inc, CDB2000-MB Datasheet - Page 3
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CDB2000-MB
Manufacturer Part Number
CDB2000-MB
Description
BOARD EVAL GEN PURPOSE PLL
Manufacturer
Cirrus Logic Inc
Datasheet
1.CDB2000-PC-LCO.pdf
(26 pages)
Specifications of CDB2000-MB
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
CS2000
Primary Attributes
Fractional-N, 6 ~ 75 MHz Low Jitter Clock Synthesizer, Clock Multiplier
Secondary Attributes
USB, I2C, SPI Interface
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1491
DS821DB1
LIST OF FIGURES
LIST OF TABLES
Figure 1.CS2000 Family Configuration Wizard, CS2000-CP Device Selected in Demo Mode .................. 5
Figure 2.Calculator Tool .............................................................................................................................. 6
Figure 3.CS2000 Family Configuration Wizard, CS2000-OTP Device Selected in Demo Mode ................ 6
Figure 4.CS2000 Family Configuration Wizard, CS2000-OTP Device Selected in Form Entry Mode ........ 7
Figure 5.CDB2000-MB Schematic Page 1 ................................................................................................ 17
Figure 6.CDB2000-MB Schematic Page 2 ................................................................................................ 18
Figure 7.CDB2000-MB Component Map .................................................................................................. 19
Figure 8.CDB2000-MB Top Layer ............................................................................................................. 19
Figure 9.CDB2000-MB Inner Layer 1 - Ground ........................................................................................ 20
Figure 10.CDB2000-MB Inner Layer 2 - Power ........................................................................................ 20
Figure 11.CDB2000-MB Bottom Layer ..................................................................................................... 21
Figure 12.CDB2000-DC Schematics ........................................................................................................ 22
Figure 13.CDB2000-DC Component Map ................................................................................................ 22
Figure 14.CDB2000-DC Top Layer ........................................................................................................... 23
Figure 15.CDB2000-DC Inner Layer 1 - Ground ....................................................................................... 23
Figure 16.CDB2000-DC Inner Layer 2 - Power ........................................................................................ 23
Figure 17.CDB2000-DC Bottom Layer ...................................................................................................... 23
Figure 18.CDB2000-PC Schematics ......................................................................................................... 24
Figure 19.CDB2000-PC Component Map ................................................................................................. 24
Figure 20.CDB2000-PC Top Layer ........................................................................................................... 25
Figure 21.CDB2000-PC Inner Layer 1 - Ground ....................................................................................... 25
Figure 22.CDB2000-PC Inner Layer 2 - Power ......................................................................................... 25
Figure 23.CDB2000-PC Bottom Layer ...................................................................................................... 25
Table 1. CDB2000-PC Family Daughter Cards .......................................................................................... 4
Table 2. CDB2000-DC Family Daughter Cards .......................................................................................... 4
Table 3. Error Codes ................................................................................................................................. 14
Table 4. User Interface Elements .............................................................................................................. 16
Table 5. Dip Switch Positions .................................................................................................................... 16
CDK2000
3