EVAL-AD9833EBZ Analog Devices Inc, EVAL-AD9833EBZ Datasheet - Page 3

• Manufacturer Part Number: EVAL-AD9833EBZ
• Description: BOARD EVAL FOR AD9833
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD9833EBZ

• Main Purpose: Timing, Direct Digital Synthesis (DDS)
• Embedded: No
• Utilized Ic / Part: AD9833
• Primary Attributes: 10-Bit DAC, 28-Bit Tuning Word Width
• Secondary Attributes: 25MHz, Graphical User Interface, 2.3 V ~ 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: EVAL-AD9833EB; EVAL-AD9833EB

SPECIFICATIONS
VDD = 2.3 V to 5.5 V, AGND = DGND = 0 V, T
Table 1.
Parameter
SIGNAL DAC SPECIFICATIONS
DDS SPECIFICATIONS (SFDR)
LOGIC INPUTS
POWER SUPPLIES
1
Operating temperature range is −40°C to +105°C; typical specifications are at 25°C.
Resolution
Update Rate
VOUT Maximum
VOUT Minimum
VOUT Temperature Coefficient
DC Accuracy
Dynamic Specifications
Spurious-Free Dynamic Range (SFDR)
Clock Feedthrough
Wake-Up Time
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
VDD
I
Low Power Sleep Mode
DD
Integral Nonlinearity
Differential Nonlinearity
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Wideband (0 to Nyquist)
Narrow Band (±200 kHz)
1
INH
/I
INL
INL
IN
INH
100nF
REGULATOR
Min
55
1.7
2.0
2.8
2.3
AD9833
A
Figure 2. Test Circuit Used to Test Specifications
CAP/2.5V
= T
Typ
10
0.65
38
200
±1.0
±0.5
60
−66
−60
−78
−60
1
3
4.5
0.5
MIN
to T
12
Rev. C | Page 3 of 24
MAX
Max
25
−56
0.5
0.7
0.8
10
5.5
5.5
, R
ROM
SIN
SET
= 6.8 kΩ for VOUT, unless otherwise noted.
Unit
Bits
MSPS
V
mV
ppm/°C
LSB
LSB
dB
dBc
dBc
dBc
dBc
ms
V
V
V
V
V
V
mA
pF
V
mA
mA
10-BIT DAC
COMP
10nF
VOUT
Test Conditions/Comments
f
f
f
f
2.3 V to 2.7 V power supply
2.7 V to 3.6 V power supply
4.5 V to 5.5 V power supply
2.3 V to 2.7 V power supply
2.7 V to 3.6 V power supply
4.5 V to 5.5 V power supply
f
I
DAC powered down, MCLK running
DD
MCLK
MCLK
MCLK
MCLK
MCLK
VDD
code dependent; see Figure 7
= 25 MHz, f
= 25 MHz, f
= 25 MHz, f
= 25 MHz, f
= 25 MHz, f
20pF
OUT
OUT
OUT
OUT
OUT
= f
= f
= f
= f
= f
MCLK
MCLK
MCLK
MCLK
MCLK
/4096
/4096
/50
/50
/4096
AD9833