EVL6563H-100W STMicroelectronics, EVL6563H-100W Datasheet - Page 27

• Manufacturer Part Number: EVL6563H-100W
• Description: EVAL BOARD FOR L6563 (100W)
• Manufacturer: STMicroelectronics
• Type: Power Factor Correctionr

Specifications of EVL6563H-100W

• Main Purpose: Power Management, Power Factor Correction
• Embedded: No
• Utilized Ic / Part: L6563
• Primary Attributes: 100W Power Factor Correction and Preregulator Combination
• Secondary Attributes: Transition Mode & Active Tracking Boost Function.
• Product: Power Management Modules
• Supply Current: 5 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: L6563H
• Other names: 497-10379; 497-10379-NHD

L6563H
6.4
where f
ripple, related to the amplitude of its 2
Figure 40
amount of maximum desired 3rd harmonic distortion. Always connect R
pin, the IC does not work properly if the pin is either left floating or connected directly to
ground.
Figure 40. R
The dynamics of the voltage feedforward input, that is the output of the multiplier, is limited
downwards at 0.8 V (see
VFF pin is below 0.8 V. This helps to prevent excessive power flow when the line voltage is
lower than the minimum specified value.
THD optimizer circuit
The L6563H is provided with a special circuit that reduces the conduction dead-angle
occurring to the AC input current near the zero-crossings of the line voltage (crossover
distortion). In this way the THD (total harmonic distortion) of the current is considerably
reduced.
A major cause of this distortion is the inability of the system to transfer energy effectively
when the instantaneous line voltage is very low. This effect is magnified by the high-
frequency filter capacitor placed after the bridge rectifier, which retains some residual
voltage that causes the diodes of the bridge rectifier to be reverse-biased and the input
current flow to temporarily stop.
To overcome this issue the device forces the PFC pre-regulator to process more energy
near the line voltage zero-crossings as compared to that commanded by the control loop.
This results in both minimizing the time interval where energy transfer is lacking and fully
discharging the high-frequency filter capacitor after the bridge.
Figure 41
R
FF
· C
L
FF
is the line frequency. The amount of 3rd harmonic distortion introduced by this
shows a diagram that helps choose the time constant R
shows the internal block diagram of the THD optimizer circuit.
[s]
current
0.01
FF
0.1
10
1
·C
0.1
FF
as a function of 3rd harmonic distortion introduced in the input
Figure 39
Doc ID 16047 Rev 2
f = 60 Hz
), so that cannot increase any more if the voltage on the
L
D
3
•
f
%
L
component, is:
=
2
D %
π
3
1
f
L
100
R
FF
f = 50 Hz
L
C
FF
FF
Application information
·C
FF
FF
10
based on the
and C
FF
to the
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