MAX4948EVKIT+ Maxim Integrated Products, MAX4948EVKIT+ Datasheet - Page 8

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MAX4948EVKIT+

Manufacturer Part Number
MAX4948EVKIT+
Description
KIT EVAL FOR MAX4948
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX4948EVKIT+

Main Purpose
Interface, Special Purpose
Utilized Ic / Part
MAX4948
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Hex SPDT Data Switch
The MAX4947 triple DPDT and the MAX4948 hex SPDT
analog switches operate from a single +1.8V to
+5.5V supply. These devices are fully specified for +3V
applications.
The MAX4947/MAX4948 have a guaranteed 4Ω (typ) on-
resistance and a low 30pF (typ) capacitance that makes
the switch ideal for data switching applications. The
MAX4947 has three logic inputs to control two switches in
pairs and the MAX4948 has one logic control input and
an enable input (EN) to disable the switches.
The MAX4947/MAX4948 provide a digital control logic
input, CB_. CB_ controls the position of the switches as
shown in the Pin Configurations/Truth Tables . Driving
CB_ rail-to-rail minimizes power consumption.
The MAX4948 features an EN input to turn all switches
on or off. When EN is driven high, CB is disabled, and
the analog inputs enter a high-impedance state. Drive
EN low to turn the switches on and enable CB.
Figure 1. Switching Time
8
_______________________________________________________________________________________
MAX4947/
MAX4948
LOGIC
INPUT
V
N_
Applications Information
C
V
L
OUT
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
OR NC_
CB_
= V
Detailed Description
GND
N_
(
R
L
R
+ R
L
Digital Control Inputs
ON
)
V
V
COM_
CC
CC
R
L
C
L
V
OUT
The on-resistance of the MAX4947/MAX4948 is very low
and stable as the analog input signals are swept
from ground to V
Characteristics ). These switches are bidirectional, allow-
ing NO_, NC_, and COM_ to be configured as either
inputs or outputs.
Power-supply bypassing improves noise margin and
prevents switching noise to propagate from V
to other components. A 0.1µF capacitor connected
from V+ to GND is adequate for most applications.
CMOS devices require proper power-supply sequencing.
Always apply V
if the input signal is not current limited.
For the latest application details on UCSP construction,
dimensions, tape carrier information, printed circuit
board techniques, bump-pad layout, and recommend-
ed reflow temperature profile, as well as the latest infor-
mation on reliability testing results, go to the Maxim
website at www.maxim-ic.com/ucsp for the Application
Note: UCSP-A Wafer-Level Chip-Scale Package.
OUTPUT
SWITCH
Timing Circuits/Timing Diagrams
LOGIC
INPUT
UCSP Applications Information
V
0V
0V
CC
CC
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
before the analog signals, especially
CC
V
50%
OUT
Power-Supply Sequencing
(see the Typical Operating
0.9 x V
Power-Supply Biasing
Analog Signal Levels
0UT
t
OFF
50%
t r < 5ns
t f < 5ns
0.9 x V
OUT
CC
supply

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