ATA6622-EK Atmel, ATA6622-EK Datasheet - Page 16

BOARD DEMO LIN SBC FOR ATA6622

ATA6622-EK

Manufacturer Part Number
ATA6622-EK
Description
BOARD DEMO LIN SBC FOR ATA6622
Manufacturer
Atmel
Datasheets

Specifications of ATA6622-EK

Main Purpose
Interface, LIN
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ATA6622
Primary Attributes
LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
Secondary Attributes
4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
6.2
16
Worst Case Calculation with R
Atmel ATA6622/ATA6624/ATA6626
Figure 6-1.
The internal oscillator has a tolerance of 20%. This means that t
The worst case calculation for the watchdog period t
The ideal watchdog time t
t
t
t
t
t
t
A microcontroller with an oscillator tolerance of ±15% is sufficient to supply the trigger inputs
correctly.
Table 6-1.
3.3V/5V
2
1,min
2,min
wdmax
wdmin
wd
NTRIG
NRES
.
R
VCC
= 29.3ms ±4.5ms (±15%)
WD_OSC
120
k
34
51
91
= 0.8
= 0.8
= t
= t
1max
1min
Undervoltage Reset
t
reset
+ t
= 24.8ms
t
t
Oscillator
1
2
Timing Sequence with R
Typical Watchdog Timings
Period
t
= 16.5ms, t
= 17.3ms, t
19.61
33.54
42.84
2min
= 4ms
osc
13.3
/µs
WD_OSC
= 16.5ms + 17.3ms = 33.8ms
wd
264.80
338.22
t
154.8
1,max
Lead
Time
2,max
d
105
= 51k
/ms
is between the maximum t
= 1.2
= 1.2
t
d
= 155ms
Window
Closed
t
20.64
35.32
45.11
t
14.0
1
trig
/ms
WD_OSC
t
t
> 200ns
t
1
2
1
= 20.6ms
= 24.8ms
= 26ms
Open Window
= 51k
t
wd
t
21.67
37.06
47.34
14.7
2
/ms
wd
t
2
= 21ms
1
is calculated as follows.
and the minimum t
Trigger Period from
1
Microcontroller
t
1
and t
t
29.32
50.14
64.05
wd
19.9
2
/ms
can also vary by 20%.
1
t
plus the minimum
2
4986J–AUTO–03/11
Watchdog Reset
Reset Time
t
nres
t
nres
= 4ms
4
4
4
4
/ms

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