MCP3909RD-3PH3 Microchip Technology, MCP3909RD-3PH3 Datasheet - Page 26

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MCP3909RD-3PH3

Manufacturer Part Number
MCP3909RD-3PH3
Description
REF DESIGN FOR MCP3909 W/18F2520
Manufacturer
Microchip Technology

Specifications of MCP3909RD-3PH3

Main Purpose
Power Management, Energy/Power Meter
Utilized Ic / Part
MCP3909, PIC18F2520, PIC18F4550
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
MCP3909
FIGURE 5-3:
5.2
The MCP3909 devices contains three different serial
modes with data presented in 2's complement coding.
• Multiplier Output
• Dual Channel Output
• Filter Input
TABLE 5-1:
DS22025B-page 26
Note 1:
1 0 1 0 0 0 0 1
1 0 1 0 1 0 0 1
1 0 1 0 0 1 0 0
1 0 1 0 1 1 0 0
1 0 1 0 1 0 1 0
1 0 1 0 1 1 1 0
1 0 1 0 0 0 1 0
1 0 1 0 0 1 1 0
F2 / SCK
F1 / SDI
F0 / CS
MCLR
Command
D7......D0
Serial Mode Entry Codes
The active power frequency outputs F
Leaving the SDI (F1) and CS (F0) pins at a known state after serial communication will control the
frequency selection. The HPF pin controls the state of the HPF for the multiplier mode output and the
output pulses from the active power D to F block.
ENTRY CODES
Dual Functionality Pin Serial Mode Entry Protocol.
Dual Channel Output Post HPF1
Dual Channel Output Pre HPF1
t
WINSET
Multiplier Output
Multiplier Output
Serial Mode
Filter Input
Filter Input
Filter Input
Filter Input
t
1
D7 D6
WINDOW
OUT0
2
, F
3
D5 D4
OUT1
4
, and HF
After entering any of these modes the active power
calculation block is still functional and presents output
pulses on F
the F2, F1, F0 output frequency selection constant can
be changed with multiple command bytes for serial
mode entry.
The command bytes to enter these modes are
described in
D3 D2 D1 D0
5
Internal State of F2, F1, F0 Constants Frequency
6
OUT
F2
0
1
0
7
1
1
1
0
0
Selection During Serial Mode
remain active after serial mode entry.
OUT0
Table
8
, F
5-1.
OUT1
© 2009 Microchip Technology Inc.
, and HF
F1 pin
F1 pin
F1 pin
F1 pin
F1
0
1
0
1
OUT
. For this reason,
(1)
F0 pin
F0 pin
F0 pin
F0 pin
F0
1
1
1
1

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