EVAL-ADM1063TQEBZ Analog Devices Inc, EVAL-ADM1063TQEBZ Datasheet - Page 29

BOARD EVALUATION FOR ADM1063TQ

EVAL-ADM1063TQEBZ

Manufacturer Part Number
EVAL-ADM1063TQEBZ
Description
BOARD EVALUATION FOR ADM1063TQ
Manufacturer
Analog Devices Inc

Specifications of EVAL-ADM1063TQEBZ

Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Embedded
No
Utilized Ic / Part
ADM1063
Primary Attributes
10 Channel Supervisor / Sequencer, 6 Voltage Output DACs
Secondary Attributes
GUI Programmable via SMBus (via USB)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note that the ADM1063 features a clock extend function for
writes to EEPROM. Programming an EEPROM byte takes
approximately 250 μs, which limits the SMBus clock for
repeated or block write operations. The ADM1063 pulls SCL
low and extends the clock pulse when it cannot accept any
more data.
READ OPERATIONS
The ADM1063 uses the following SMBus read protocols.
Receive Byte
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
1.
2.
3.
4.
5.
6.
In the ADM1063, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write
byte/word operation, as shown in Figure 43.
Block Read
In a block read operation, the master device reads a block of
data from a slave device. The start address for a block read must
have been set previously. In the ADM1063, this is done by a
send byte operation to set a RAM address or a write byte/word
operation to set an EEPROM address. The block read operation
itself consists of a send byte operation that sends a block read
command to the slave, immediately followed by a repeated start
and a read operation that reads out multiple data bytes, as follows:
1.
2.
3.
4.
5.
6.
7.
An address crosses a page boundary. In this case, both
pages must be erased before programming.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The addressed slave device asserts an ACK on SDA.
The master receives a data byte.
The master asserts a NACK on SDA.
The master asserts a stop condition on SDA, and the
transaction ends.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an ACK on SDA.
The master sends a command code that tells the slave
device to expect a block read. The ADM1063 command
code for a block read is 0xFD (1111 1101).
The slave asserts an ACK on SDA.
The master asserts a repeat start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
Figure 43. Single Byte Read from the EEPROM or RAM
1
S
ADDRESS
SLAVE
2
R
A
3
DATA
4
5
A
P
6
Rev. B | Page 29 of 32
8.
9.
10. The master asserts an ACK on SDA.
11. The master receives 32 data bytes.
12. The master asserts an ACK on SDA after each data byte.
13. The master asserts a stop condition on SDA to end
Error Correction
The ADM1063 provides the option of issuing a packet error
correction (PEC) byte after a write to the RAM, a write to the
EEPROM, a block write to the RAM/EEPROM, or a block read
from the RAM/ EEPROM. This option enables the user to verify
that the data received by or sent from the ADM1063 is correct.
The PEC byte is an optional byte sent after the last data byte has
been written to or read from the ADM1063. The protocol is the
same as for a block read for Step 1 to Step 12 and then proceeds
as follows:
13. The ADM1063 issues a PEC byte to the master. The master
14. A NACK is generated after the PEC byte to signal the end
15. The master asserts a stop condition on SDA to end
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
See the SMBus Version 1.1 specification for details.
An example of a block read with the optional PEC byte is shown
in Figure 45.
S
1
S
1
ADDRESS
ADDRESS
SLAVE
SLAVE
The slave asserts an ACK on SDA.
The ADM1063 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1063
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus Version 1.1 specification.
the transaction.
checks the PEC byte and issues another block read if the
PEC byte is incorrect.
of the read.
the transaction.
C(x) = x
2
2
Figure 45. Block Read from the EEPROM or RAM with PEC
W A
W A
Figure 44. Block Read from the EEPROM or RAM
8
3
3
+ x
COMMAND 0xFD
COMMAND 0xFD
(BLOCK READ)
(BLOCK READ)
2
+ x
4
4
1
+ 1
A
A
5
5
6
S
6
S
ADDRESS
ADDRESS
SLAVE
SLAVE
7
7
R A
R A
8
8
COUNT
COUNT
BYTE
BYTE
9
DATA
9
32
ADM1063
10
10
A
A
A
DATA
DATA
DATA
32
11
11
1
1
PEC
13
12
12
A
A
A
14
A
13
15
P
P

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