CDB42528 Cirrus Logic Inc, CDB42528 Datasheet - Page 57

• Manufacturer Part Number: CDB42528
• Description: BOARD EVAL FOR CS42528/CS49300
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42528

• Main Purpose: Audio, Audio Processing
• Embedded: Yes, DSP
• Utilized Ic / Part: CS49300, CS42528
• Primary Attributes: 8 Single-Ended Analog Inputs and Outputs, 4 S/PDIF Inputs and 2 S/PDIF Outputs
• Secondary Attributes: Parallel, RS422, RS232, UDSP Interfaces
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1503

DS586F1
6.11.3
6.11.4 SERIAL AUDIO INTERFACE SERIAL PORT MUTE (MUTE SAI_SP)
6.11.5 SOFT VOLUME RAMP-UP AFTER ERROR (RMP_UP)
Soft Ramp
Soft Ramp on Zero Crossing
AUTO-MUTE (AMUTE)
Note:
Default = 1
0 - Disabled
1 - Enabled
Function:
Default = 0
0 - Disabled
1 - Enabled
Function:
Default = 0
0 - Disabled
1 - Enabled
Function:
occur on a signal zero crossing to minimize audible artifacts. The requested level-change will occur
after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample
rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel.
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally
ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock
periods.
Soft Ramp and Zero Cross Enable dictates that signal level changes, either by attenuation changes
or muting, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level
change will occur after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms
at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross function is
independently monitored and implemented for each channel.
The digital-to-analog converters of the CS42528 will mute the output following the reception of 8192
consecutive audio samples of static 0 or -1. A single sample of non-static data will release the mute.
Detection and muting is done independently for each channel. The quiescent voltage on the output
will be retained, and the MUTEC pin will go active during the mute period. The muting function is af-
fected, similar to volume control changes, by the Soft and Zero Cross bits (SZC[1:0]).
When enabled, the Serial Audio Interface port (SAI_SP) will be muted.
An un-mute will be performed after executing a filter mode change, after a MCLK/LRCK ratio change
or error, and after changing the Functional Mode. When this feature is enabled, this un-mute is affect-
ed, similar to attenuation changes, by the Soft and Zero Cross bits (SZC[1:0]). When disabled, an
immediate un-mute is performed in these instances.
For best results, it is recommended that this bit be used in conjunction with the RMP_DN bit.
CS42528
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