KS8842-16MQL-EVAL Micrel Inc, KS8842-16MQL-EVAL Datasheet - Page 118

no-image

KS8842-16MQL-EVAL

Manufacturer Part Number
KS8842-16MQL-EVAL
Description
EVAL KIT EXPERIMENTAL KS8842
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8842-16MQL-EVAL

Main Purpose
Interface, Ethernet
Utilized Ic / Part
KS8842
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Not Compliant
Examples:
Additional MIB Information
Per Port MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
All Ports Dropped Packet MIB counters are not cleared after they are accessed. The application needs to keep track of
overflow and valid conditions on these counters.
Micrel, Inc.
October 2007
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
Then
2. MIB Counter Read (read port 2 “Rx64Octets” counter at indirect address offset 0x2E)
Then
3. MIB Counter Read (read “Port1 TX Drop Packets” counter at indirect address offset 0x100)
Then
Write to reg. IACR with 0x1c0e (set indirect address and trigger a read MIB counters operation)
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
Read reg. IADR4 (MIB counter value 15-0)
Write to reg. IACR with 0x1c2e (set indirect address and trigger a read MIB counters operation)
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
Read reg. IADR4 (MIB counter value 15-0)
Write to reg. IACR with 0x1d00 (set indirect address and trigger a read MIB counters operation)
Read reg. IADR4 (MIB counter value 15-0)
118
// If bit 30 = 0, restart (reread) from this register
// If bit 30 = 0, restart (reread) from this register
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9

Related parts for KS8842-16MQL-EVAL