SI3232PPT0-EVB Silicon Laboratories Inc, SI3232PPT0-EVB Datasheet - Page 54
SI3232PPT0-EVB
Manufacturer Part Number
SI3232PPT0-EVB
Description
BOARD EVAL W/SI3200 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet
1.SI3232-FQ.pdf
(128 pages)
Specifications of SI3232PPT0-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Si3232
In Figure 28, the CID field is 0. As this field is decremented (LSB to MSB order), the value decrements for each SDI
down the line. The BRDCST, R/W, and REG/RAM bits remain unchanged as the control word passes through the
entire chain. The odd SDIs are internal to the device and represent the SDI to SDI_THRU connection between
channels of the same device. A unique CID is presented to each channel, and the channel receiving a CID value of
0 is the target of the operation (channel 0 in this case). The last line of Figure 28 illustrates that in broadcast mode,
all bits are passed through the chain without permutation.
54
SDI0
SDI1 (Internal)
SDI2
SDI3 (Internal)
SDI 0-15
SDI15
SDI0-15
CS
SCLK
SDI
SDO
Figure 28. Sample SPI Control Word to Address Channel 0
Figure 29. Register Write Operation via an 8-Bit SPI Port
CONTROL
BRDCST
0
0
0
0
0
0
1
R/W
A
A
A
A
A
A
A
REG/RAM
Preliminary Rev. 0.96
SPI Control Word
B
B
B
B
B
B
B
ADDRESS
Reserved
C
C
C
C
C
C
C
CID[0]
D
0
1
0
1
0
1
CID[1]
DATA [7:0]
0
1
1
0
1
0
E
CID[2]
0
1
1
1
0
0
F
CID[3]
Hi-Z
G
0
1
1
1
0
0
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