SI3232PPTX-EVB Silicon Laboratories Inc, SI3232PPTX-EVB Datasheet - Page 42

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SI3232PPTX-EVB

Manufacturer Part Number
SI3232PPTX-EVB
Description
BOARD EVAL W/DISCRETE INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet

Specifications of SI3232PPTX-EVB

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3232
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si3232
4.11. Loop Closure Mask
The Dual ProSLIC implements a loop closure mask to
ensure mode change between Ringing and Active or
On-hook Transmission without causing an erroneous
loop-closure detection. The loop-closure mask register,
LCRMASK, should be set such that loop-closure
detections are ignored for (LCRMASK x 1.25 ms/LSB)
42
ILOOP
Processor
Signal
Input
LFS
Figure 20. Ring Trip Detect Processing Circuitry
Digital
LPF
Digital
RTPER
LPF
AC Ring Trip
DC Ring Trip
Threshold
Threshold
RTACTH
RTDCTH
Preliminary Rev. 0.96
_
+
+
_
amount of time. The programmed time is set to mask
detection of transitional currents that occur when exiting
the ringing mode while driving a reactive load (i.e.,
5 REN). A typical setting is 80 ms (LCRMASK = 0x40).
Debounce
Filter_AC
RTACDB
Debounce
RTDCDB
Filter_DC
Interrupt
RTRIPE
Logic
RTP
RTRIPS

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