LM5068EVAL/NOPB National Semiconductor, LM5068EVAL/NOPB Datasheet - Page 17

EVALUATION BOARD FOR LM5068

LM5068EVAL/NOPB

Manufacturer Part Number
LM5068EVAL/NOPB
Description
EVALUATION BOARD FOR LM5068
Manufacturer
National Semiconductor
Datasheet

Specifications of LM5068EVAL/NOPB

Main Purpose
Power Management, Hot Swap Controller
Embedded
No
Utilized Ic / Part
LM5068
Primary Attributes
High Side MOSFET Driver, Inrush Current Limiting
Secondary Attributes
-10 V ~ 90 V Supply
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LM5068EVAL
*LM5068EVAL/NOPB
LM5068EVAL
Timing Diagrams
During normal operation, if the OV pin exceeds OV HIGH, as
shown at time point 1 in the above diagram, the TIMER
status is unaffected. The GATE and PWRGD ( for LM5068-1
& -2) pins are pulled low and the load is disconnected. At
(Continued)
FIGURE 7. Over-Voltage Timing Behavior
17
time point 2, OV recovers and drops below the OV LOW
threshold, the GATE start-up cycle begins. If the load capaci-
tor is completely depleted during OV conditions, a full
start-up cycle is initiated.
20078627
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