LMX2485E EVAL National Semiconductor, LMX2485E EVAL Datasheet - Page 28

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LMX2485E EVAL

Manufacturer Part Number
LMX2485E EVAL
Description
BOARD EVALUATION LMX2485E
Manufacturer
National Semiconductor
Series
PLLatinum™r
Datasheets

Specifications of LMX2485E EVAL

Main Purpose
Timing, Frequency Synthesizer
Utilized Ic / Part
LMX2485E
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
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REGISTER
2.3 R2 REGISTER
2.3.1 IF_N[18:0] -- IF N Divider Value
IF_N Counter Programming with the 8/9 Prescaler (IF_P=0)
Operation with the 16/17 Prescaler (IF_P=1)
2.3.4 IF_PD -- IF Power Down Bit
When this bit is set to 0, the IF PLL operates normally. When it is set to 1, the IF PLL powers down and the output of the IF PLL
charge pump is set to a TRI-STATE mode. If the ATPU bit is set and register R0 is written to, the IF_PD will be reset to 0 and the
IF PLL will be powered up. If the CE pin is held low, the IF PLL will be powered down, overriding the IF_PD bit.
2621
5242
Valu
Valu
24-5
48-2
240
241
56
57
43
39
87
...
...
N
N
e
5
e
23
47
R2
0
0
1
0
0
1
.
.
48-51, 64-68, 80-85, 96-102, 112-119, 128-136, 144-153, 160-170, 176-187, 192-204, 208-221, 224-238
0
0
1
0
0
1
.
.
IF_PD
23
0
0
1
0
0
1
.
.
22
0
0
1
0
0
1
N values less than or equal to 23 are prohibited because IF_B
N values less than or equal to 47 are prohibited because IF_B
.
.
21
0
0
1
0
0
1
.
.
20
19
0
0
1
0
0
1
.
.
18
0
0
1
0
0
1
.
.
Legal divide ratios in this range are:
Legal divide ratios in this range are:
17
IF_B
IF_B
24-27, 32-36, 40-45, 48-54
0
0
1
0
0
1
.
.
16
DATA[19:0]
0
0
1
0
0
1
15
.
.
IF_N[18:0]
IF_N[18:0]
28
14
0
0
1
0
0
1
.
.
13
0
0
1
0
0
1
.
.
12
0
0
1
1
1
1
.
.
11
10 9 8 7 6 5 4
1
1
1
1
1
1
.
.
1
1
1
1
1
1
.
.
3 is required.
3 is required.
1
1
1
1
1
1
.
.
0
0
0
0
0
1
.
.
C3
3
0
0
0
1
0
0
1
.
.
IF_A
IF_A
C2
2
1
0
0
1
0
0
1
.
.
C1
1
0
0
1
1
0
1
1
.
.
C0
0
1

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