SI5364-EVB Silicon Laboratories Inc, SI5364-EVB Datasheet - Page 36

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SI5364-EVB

Manufacturer Part Number
SI5364-EVB
Description
BOARD EVALUATION FOR SI5364
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5364-EVB

Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5364
Processor To Be Evaluated
SI5364
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1146
Si5364
6. 11x11 mm PBGA Card Layout
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
36
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1.
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components.
be 60 µm minimum, all the way around the pad.
paste release.
Symbol
C1
C2
E1
E2
X
0.40
Min
Rev. 2.5
Nom
0.45
9.00
9.00
1.00
1.00
Max
0.50

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