SI5367/68-EVB Silicon Laboratories Inc, SI5367/68-EVB Datasheet - Page 6

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SI5367/68-EVB

Manufacturer Part Number
SI5367/68-EVB
Description
BOARD EVAL FOR SI5367/68
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5367/68-EVB

Main Purpose
Timing, Clock Generator
Utilized Ic / Part
SI5367, SI5368
Processor To Be Evaluated
Si5367 and Si5368
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si5365/66-EVB
Si5367/68-EVB
5.5. MCU
The MCU communicates with the PC over USB so that PC resident software can be used to control and monitor
the Si536x. The USB connector is J6 and the debug port, by which the MCU is flashed, is J31. The reset switch,
SW1, resets the MCU, but not the CPLD. The MCU is a self-contained USB master and runs all of the code
required to control and monitor the Si536x, both in the MCU mode and in the pin-controlled modes.
U3 contains a unique serial number for each board and U5 is an EEPROM that is used to store configuration
information for the board. The board powers up in free run mode with a configuration that is outlined in "Appendix—
Powerup and Factory Default Settings" on page 25. For the pin controlled parts (Si5365/66-EVB), the contents of
U5 configure the board on power up so that jumper plugs may be used. If DSPLLsim is subsequently run, the
jumper plugs should be removed before DSPLLsim downloads the configuration to the EVB so that the jumpers do
not conflict with the CPLD outputs. For microprocessor parts, U5 configures the EVB for a specific frequency plan
as described in "Appendix—Powerup and Factory Default Settings" on page 25.
The Evaluation board has a serial port connector (J22) that supports the following:
For details, see J22 (Table 6).
Though they are not needed on this Evaluation Board because the CPLD has low output leakage current, some
applications will require the use of external pullup and pulldown resistors when three level pins are being driven by
external logic drivers. This is particularly true for the pin-controlled parts: the Si5365 and Si5367. Consult the
Si53xx-RM Any-Rate Precision Clock Family Reference Manual for details.
LVPECL outputs will not function at 1.8 V. If the Si536x part is to be operated at 1.8 V, the output format
needs to be changed by altering either the SFOUT pins (Si5365/66) or the SFOUT register bits (Si5367/68).
5.6. Power and 2L Signals
This evaluation board requires two power inputs +3.3 V for the MCU and either 1.8 or 2.5 V for the Any-Rate
Precision Clock part. The power connector is J40. The grounds for the two supplies are tied together on the EVB.
There are sixteen LEDs, as described in Table 3. J14 is a three by 10 pin male header by which the user can
manually set the values of the two-level inputs using jumper plugs connected to either ground (silkscreen labeled
L) or the power supply (labeled H). J8 is a twenty pin ribbon header that brings out all of the status outputs from the
Si536x. Note that some pins are shared and serve as both inputs and outputs, depending on how the device is
configured. For users that wish to remotely access the input and output pins settings with external hardware, J14
and J8 can be connected to ribbon cables.
5.7. 3L Pins
The three-level inputs can all be manually configured by installing jumper plugs at J17, either H or L. The M level is
achieved by not installing a jumper plug at a given location. J17 can also be used as a connection to an external
circuit that controls these pins. J22 is a ten pin ribbon header that is provided so that an external processor can
control the Si536x over either the SPI or I
6
Control by the MCU/CPLD of an Any-Rate part on an external target board.
Control of the Any-Rate part that is on the Evaluation board through an external SPI or I
2
C bus.
Rev. 0.4
2
C port.

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