DS32512DK Maxim Integrated Products, DS32512DK Datasheet - Page 71

• Manufacturer Part Number: DS32512DK
• Description: KIT DEMO FOR DS32512
• Manufacturer: Maxim Integrated Products

Specifications of DS32512DK

• Main Purpose: Telecom, Line Interface Units (LIUs)
• Utilized Ic / Part: DS32512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

Bits 2, 0: Transmit Resistor Adjustment (TRESADJ[2:0]). These bits are used to adjust the internal termination
resistance of the transmitter. See Section 8.2.8.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 5: Receive Fail 2 Enable (RFL2E). This bit is used to enable the receive failure type 2 detection. See Section
8.3.8.
Bit 4: Receive LIU Monitor Mode (RMON). This bit is used to enable the receive LIU monitor mode preamplifier.
Enabling the preamplifier adds about 14dB of linear amplification for use in monitor applications where the signal
has been reduced 20dB using resistive attenuator circuits. Note: When enabled, the preamp is turned on or off
automatically depending upon the input signal level. See Section 8.3.2.
Bit 3: Receive Termination Resistor Enable (RTRE). This bit indicates when the receiver internal termination is
enabled. See Section 8.3.1.
Bits 2 to 0: Receive Resistor Adjustment (RRESADJ[2:0]). These bits are used to adjust the internal termination
resistance of the receiver. See Section 8.3.1.
000 = 75 Ω
001 = 82 Ω
010 = 90 Ω
011 = 100 Ω
100 = 68 Ω
101 = 62 Ω
110 = 56 Ω
111 = 50 Ω
0 = Disable receive failure type 2 detection
1 = Enable receive failure type 2 detection
0 = Disable the preamp
1 = Enable the preamp
0 = Disabled, the receiver is terminated externally
1 = Enabled, the receiver is terminated internally
000 = 75 Ω
001 = 82 Ω
010 = 90 Ω
011 = 100 Ω
100 = 68 Ω
101 = 62 Ω
110 = 56 Ω
111 = 50 Ω
15
—
—
0
7
0
14
—
—
0
6
0
LIU.CR2
LIU Control Register 2
n * 80h + 22h
RFL2E
13
—
0
5
0
RMON
12
—
71 of 130
0
4
0
RTRE
11
—
0
0
3
10
—
0
2
0
DS32506/DS32508/DS32512
RRESADJ[2:0]
—
9
0
1
0
—
8
0
0
0