EVAL-AD7490CBZ Analog Devices Inc, EVAL-AD7490CBZ Datasheet - Page 4
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EVAL-AD7490CBZ
Manufacturer Part Number
EVAL-AD7490CBZ
Description
BOARD EVAL CONTROL FOR AD7490
Manufacturer
Analog Devices Inc
Datasheet
1.AD7490BRUZ.pdf
(28 pages)
Specifications of EVAL-AD7490CBZ
Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
1M
Data Interface
Serial
Inputs Per Adc
16 Single Ended
Input Range
0 ~ 5 V
Power (typ) @ Conditions
12.5mW @ 1MSPS, 5 V
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7490
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD7490
Parameter
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
POWER REQUIREMENTS
1
2
3
4
Specifications apply for f
See the Terminology section.
Guaranteed by characterization.
See the Power vs. Throughput Rate section.
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Floating State Leakage Current
Floating State Output Capacitance
Output Coding
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
V
V
I
Power Dissipation
DD
DD
DRIVE
Normal Mode (Static)
Normal Mode (Operational)
(f
Auto Standby Mode
Auto Shutdown Mode
Full Shutdown Mode
Normal Mode (Operational)
Auto Standby Mode (Static)
Auto Shutdown Mode (Static)
Full Shutdown Mode
4
S
= Maximum Throughput)
IN
4
SCLK
INL
IN
INH
+
up to 20 MHz. However, for serial interfacing requirements, see the Timing Specifications section.
OL
OH
3
2
3
Test Conditions/Comments
V
I
I
WEAK/TRI bit set to 0
WEAK/TRI bit set to 0
Coding bit set to 1
Coding bit set to 0
16 SCLK cycles, SCLK = 20 MHz
Sine wave input
Full-scale step input
V
section)
Digital inputs = 0 V or V
V
V
V
f
Static
f
Static
SCLK on or off
V
V
V
V
V
V
V
V
SOURCE
SINK
SAMPLE
SAMPLE
IN
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 0 V or V
= 5 V (see the Serial Interface
= 2.7 V to 5.25 V, SCLK on or off
= 4.75 V to 5.25 V, f
= 2.7 V to 3.6 V, f
= 5 V, f
= 3 V, f
= 5 V
= 3 V
= 5 V
= 3 V
= 5 V
= 3 V
= 200 μA
= 200 μA; V
= 500 kSPS
= 250 kSPS
SCLK
SCLK
DRIVE
= 20 MHz
= 20 MHz
Rev. C | Page 4 of 28
DD
= 2.7 V to 5.25 V
SCLK
SCLK
DRIVE
= 20 MHz
= 20 MHz
Min
0.7 × V
V
2.7
2.7
DRIVE
− 0.2
DRIVE
Straight (Natural) Binary
Twos Complement
Typ
±0.01
600
1.55
960
0.02
Max
0.3 × V
±1
10
0.4
±10
10
800
300
300
1
5.25
5.25
2.5
1.8
100
0.5
0.5
12.5
5.4
460
276
2.5
1.5
2.5
1.5
DRIVE
Unit
V
V
μA
pF
V
V
μA
pF
ns
ns
ns
MSPS
V
V
μA
mA
mA
mA
μA
μA
μA
μA
mW
mW
μW
μW
μW
μW
μW
μW