AD9444-LVDS/PCBZ Analog Devices Inc, AD9444-LVDS/PCBZ Datasheet - Page 6

• Manufacturer Part Number: AD9444-LVDS/PCBZ
• Description: BOARD EVAL FOR AD9444 ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9444-LVDS/PCBZ

• Number Of Adc's: 1
• Number Of Bits: 14
• Sampling Rate (per Second): 80M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 2 Vpp
• Power (typ) @ Conditions: 1.25W @ 80MSPS
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9444
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9444
SWITCHING SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, unless otherwise noted.
Table 4.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
1
2
3
With duty cycle stabilizer (DCS) enabled.
Output propagation delay is measured from clock 50% transition to data 50% transition, with 5 pF load.
LVDS R
Maximum Conversion Rate
Minimum Conversion Rate
CLK Period
CLK Pulse Width High
CLK Pulse Width Low
Output Propagation Delay—CMOS (t
Output Propagation Delay—LVDS (t
Pipeline Delay (Latency)
Aperture Delay (t
Aperture Uncertainty (Jitter, t
DATA OUT
TERM
= 100 Ω. Measured from the 50% point of the rising edge of CLK+ to the 50% point of the data transition.
DCO+
DCO–
CLK+
CLK–
A
IN
A
)
1
1
(t
(t
CLKL
N–1
CLKH
t
CLKH
)
)
J
)
t
CLKL
t
CPD
N
PD
PD
)
3
)
2
1/
(DX+, DCO+)
(DX, DCO+)
f
N–12
S
t
PD
12 CLOCK CYCLES
N+1
N–11
Figure 2. LVDS Mode Timing Diagram
Rev. 0 | Page 6 of 40
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
N
Test Level
VI
V
V
V
V
IV
VI
V
V
V
N+1
Min
80
12.5
4
4
3
3
AD9444BSVZ-80
Typ
5.25
5
12
0.2
Max
10
8
7.5
Unit
MSPS
MSPS
ns
ns
ns
ns
ns
Cycles
ns
ps rms