STEVAL-CBL004V1 STMicroelectronics, STEVAL-CBL004V1 Datasheet - Page 15

• Manufacturer Part Number: STEVAL-CBL004V1
• Description: BOARD DEMONSTRATION LNBH PS
• Manufacturer: STMicroelectronics

Specifications of STEVAL-CBL004V1

• Main Purpose: Special Purpose DC/DC, LNB
• Board Type: Fully Populated
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Output: -
• Voltage - Input: -
• Power - Output: -
• Utilized Ic / Part: -
• Frequency - Switching: -
• Outputs And Type: -
• Regulator Topology: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

LNBH24L
7
7.1
7.2
7.3
S
Mode
Write
Read
MSB
0
0
LNBH24 software description
The LNBH24L I²C interface controls both the IC sections A and B depending on the address
sent before the DATA byte. All the below description is valid for both sections.
Interface protocol
The interface protocol comprises:
●
●
●
●
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, two addresses for each section selectable by ADDR-A/B pins (see
System register (SR, 1 Byte for each section A and B)
Write = control bits functions in write mode
Read = diagnostic bits in read mode.
All bits reset to 0 at power on
Transmitted data (I²C bus write mode) for each sections A/B
When the R/W bit in the section address is set to 0, the main microprocessor can write on
the system register (SR) of the relative section (A or B, depending on the 7 bit address
value) via I²C bus. All and 8 bits are available and can be written by the microprocessor to
control the device functions as per the below truth table (
TEST1
Section address (A or B)
MSB
PCL
0
A start condition (S)
A chip address byte [the LSB bit determines read (=1)/write (=0) transmission]
A sequence of data (1 byte + acknowledge)
A stop condition (P)
1
TEST2
TTX
0
X
X
TEST3
TEN
LSB
R/W ACK
Doc ID 16857 Rev 2
LLC
LLC
MSB
VSEL
VSEL
Table 7
Data
LNBH24 software description
EN
EN
).
TEST4
OTF
Table 11
LSB
ACK
TEST5
LSB
)
OLF
15/25
P