IRAC1166-100W International Rectifier, IRAC1166-100W Datasheet - Page 9

• Manufacturer Part Number: IRAC1166-100W
• Description: BOARD DEMO 100W FOR IR1166
• Manufacturer: International Rectifier

Specifications of IRAC1166-100W

• Main Purpose: AC/DC, Secondary Side
• Outputs And Type: 1, Isolated
• Power - Output: 100W
• Voltage - Output: 16V
• Current - Output: 6.25A
• Voltage - Input: 90 ~ 264VAC
• Regulator Topology: Flyback
• Board Type: Fully Populated
• Utilized Ic / Part: IR1166S, IRF7853
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency - Switching: -

5.0 CIRCUIT FEATURES
5.1 OVT setting:
The Offset Voltage Threshold can be easily selected by changing the position of jumper J3
according to system mode of operation as shown on Table 1 below. Since the demo board is
practically designed to operate in Critical conduction mode, OVT pin can be left floating or
grounded to prolong the MOSFET’s channel conduction period a bit compared 5to
connecting it to Vcc. As a result, this would give the advantage of further reducing the
conduction period of the MOSFET’s (SR1 & SR2) body diode, thus achieving more efficient
operation. Reducing the chance of having reverse current during the fast turn-off phase of
the sync-fets is another strong reason for having this feature available.
Table 1
System mode of operation
OVT connected to
DCM or CrCM
Ground, V
= -3.5mV
TH1
Boundary CCM
Floating, V
= -10.5mV
TH1
CCM
V
, V
= -19.0 mV
CC
TH1
The general observation during light load condition (~10-20% full load) is that a ~0.5 to
~1.2% efficiency improvement was seen for OVT=Gnd compared to OVT=floating. This small
difference is no longer significant when the load becomes heavy for CrCM operation.
5.2 Enable setting:
The IC is enabled by default knowing that EN pin is tied internally to VCC through a resistor.
Having a jumper on J4 location will connect EN pin to Gnd and will immediately disable the
internal gate drive circuit of the IR1166 IC. By putting a jumper J4 in/out would help the user
to quickly evaluate the effect in efficiency by investigating the change in input power as a
result of having SR fets working compared to just having an ordinary passive rectification
offered by the body diode(s) when the gate drive is disabled.
CAUTION :
This demo board is basically designed for evaluation of functionality of IR1166 IC. The users
may disable the IC by shorting J4 EN to GND for quick testing at full load but with care
should be taken. It is strongly advise not to load more than 4.6 - 6Amp with IR1166 disabled
for a prolong period of time (>1min). This is to prevent damaging the MOSFET’s body diode
due to overheating when the load current passes through the mosfets’ body diode while SRs
are turned-OFF. Never power-up the unit without shorting J5.
5.3 Minimum ON Time (MOT) setting:
MOT setting is used to de-sensitize the IC from multiple change in Vsd during the turn-ON
phase of SRs which is cause by the ringing of the secondary winding voltage (Vsec). MOT
10
can be adjusted through Rs18 (according to AN1087 simplified equation R
= 2.5x10
*t
MOT
mot
) and is chosen to be 400 ns which is usually enough to ignore the parasitic noises at Vsd in
a quasi-resonant switching converters such as this demo board.
Rev.1A
18 August 2006
RD#0618
Page 9 of 24
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http://www.irf.com/ Data and specifications subject to change without notice.