LMZ14203DEMO/NOPB National Semiconductor, LMZ14203DEMO/NOPB Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
LMZ14203DEMO/NOPB
Manufacturer Part Number
LMZ14203DEMO/NOPB
Description
BOARD DEV PWR MODULE LMZ14203
Manufacturer
National Semiconductor
Series
SIMPLE SWITCHER®r
Specifications of LMZ14203DEMO/NOPB
Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
3.3V
Current - Output
3A
Voltage - Input
6 ~ 42 V
Regulator Topology
Buck
Frequency - Switching
Up to 1MHz
Board Type
Fully Populated
Utilized Ic / Part
LMZ14203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Other names
LMZ14203DEMO
natively, V
frequency unchanged.
Additionally note, the minimum off-time of 260 ns limits the
maximum duty ratio. Larger R
lected in any application requiring large duty ratio.
Discontinuous Conduction and Continuous Conduction
Modes
At light load the regulator will operate in discontinuous con-
duction mode (DCM). With load currents above the critical
conduction point, it will operate in continuous conduction
mode (CCM). When operating in DCM the switching cycle
begins at zero amps inductor current; increases up to a peak
value, and then recedes back to zero before the end of the
off-time. Note that during the period of time that inductor cur-
rent is zero, all load current is supplied by the output capacitor.
The next on-time period starts when the voltage on the at the
FB pin falls below the internal reference. The switching fre-
quency is lower in DCM and varies more with load current as
compared to CCM. Conversion efficiency in DCM is main-
tained since conduction and switching losses are reduced
with the smaller load and lower switching frequency. Operat-
ing frequency in DCM can be calculated as follows:
f
In CCM, current flows through the inductor through the entire
switching cycle and never falls to zero during the off-time. The
switching frequency remains relatively constant with load cur-
rent and line voltage variations. The CCM operating frequen-
cy can be calculated using equation 7 above.
Following is a comparison pair of waveforms of the showing
both CCM (upper) and DCM operating modes.
The approximate formula for determining the DCM/CCM
boundary is as follows:
I
Following is a typical waveform showing the boundary condi-
tion.
SW(DCM)
DCB
≊
V
V
O
≊
IN
*(V
V
= 24V, V
IN(MAX)
O
IN
*(V
CCM and DCM Operating Modes
–V
IN
O
-1)*6.8μH*1.18*10
)/(2*6.8 μH*f
can also be limited in order to keep the
O
= 3.3V, I
O
SW(CCM)
ON
= 3A/0.4A 2 μsec/div
(lower F
20
*V
*I
O
IN
/(V
) (16)
SW
IN
30107012
) should be se-
–V
O
)*R
ON
2
(15)
11
The inductor internal to the module is 6.8 μH. This value was
chosen as a good balance between low and high input voltage
applications. The main parameter affected by the inductor is
the amplitude of the inductor ripple current (I
calculated with:
I
Where V
mined from equation 10.
If the output current I
I
aware that the lower peak of I
eration is required.
POWER DISSIPATION AND BOARD THERMAL
REQUIREMENTS
For the design case of V
(MAX)
thermal resistance from case to ambient of:
θ
Given the typical thermal resistance from junction to case to
be 1.9 °C/W. Use the 85°C power dissipation curves in the
Typical Performance Characteristics section to estimate the
P
it is 2.25W.
θ
To reach θ
effectively. With no airflow and no external heat, a good esti-
mate of the required board area covered by 1 oz. copper on
both the top and bottom metal layers is:
Board Area_cm
As a result, approximately 31.5 square cm of 1 oz copper on
top and bottom layers is required for the PCB design. The
PCB copper heat sink must be connected to the exposed pad.
Approximately thirty six, 10mils (254 μm) thermal vias spaced
59mils (1.5 mm) apart must connect the top copper to the
bottom copper. For an example of a high thermal performance
PCB layout, refer to the Evaluation Board application note
AN-2024.
PC BOARD LAYOUT GUIDELINES
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce and resistive voltage drop in the traces. These
can send erroneous signals to the DC-DC converter resulting
LR P-P
L
CA
CA
, the higher and lower peak of I
IC-LOSS
< (T
<(125 — 85) / 2.25W — 1.9 = 15.8
= 85°C , and T
=V
J-MAX
V
for the application being designed. In this application
O
IN
IN
*(V
CA
is the maximum input voltage and f
= 24V, V
IN
— T
= 15.8, the PCB is required to dissipate heat
- V
Transition Mode Operation
2
> 500°C x cm
AMB(MAX)
O
)/(6.8µH*f
JUNCTION
O
O
= 3.3V, I
is determined by assuming that I
IN
) / P
= 24V, V
SW
= 125°C, the device must see a
LR
IC-LOSS
2
O
*V
/W / θ
must be positive if CCM op-
= 0.5 A 2 μsec/div
IN
LR
) (17)
O
can be determined. Be
- θ
CA
= 3.3V, I
JC
(19)
(18)
30107014
LR
O
). I
SW
www.national.com
= 3A, T
LR
is deter-
can be
AMB
O
=