LM5085EVAL National Semiconductor, LM5085EVAL Datasheet - Page 3

• Manufacturer Part Number: LM5085EVAL
• Description: BOARD EVALUATION FOR LM5085
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM5085EVAL

• Design Resources: LM(2)5085 Quick Start Calculator
• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 5V
• Current - Output: 4.5A
• Voltage - Input: 5.5 ~ 55V
• Regulator Topology: Buck
• Frequency - Switching: 300kHz
• Board Type: Fully Populated
• Utilized Ic / Part: LM5085
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

A) Sense resistor method – This evaluation board is sup-
plied configured for the sense resistor method of current limit
detection. Jumpers A-B are in place at both jumper locations
(JP1, JP2), which connects the ADJ pin resistor (R3) and the
ISEN pin across the sense resistor (R5). If the voltage across
R5 exceeds the voltage across R3 during the on-time, the
current limit comparator switches to turn off Q1. The voltage
across R3 is set by an internal 40 µA current sink at the ADJ
pin. The current at which the current limit comparator switches
is calculated from:
With R5 = 10 mΩ and R3 = 1.91 kΩ, the nominal current limit
threshold calculates to 7.64A. Since that is the peak of the
inductor current waveform, the load current is equal to that
peak value minus one half the ripple current amplitude. At Vin
= 5.5V, the ripple amplitude is 116 mAp-p, and the load cur-
rent at current limit is equal to 7.6 A. At Vin = 55V, the ripple
amplitude is 1190 mAp-p, and the load current at current limit
is equal to 7A.
Using the tolerances for the ADJ pin current and the current
limit comparator offset, the maximum current limit threshold
calculates to:
and the load current at current limit calculates to 10A at 5.5V,
and 9.5A at 55V. The minimum current limit thresholds cal-
culate to:
and the load current at current limit calculates to 5.15A at
5.5V, and 4.62A at 55V.
To change the current limit threshold the value for R5 should
be chosen to achieve 50 mV to 100 mV across it at current
limit, staying within the practical limitations of power dissipa-
tion and physical size of the resistor. A larger value for R5
reduces the effects of the current limit comparator offset, but
at the expense of higher power dissipation. After selecting the
value for R5, calculate the value for R3 by rearranging Equa-
tion 1 above. See the Applications Information section of the
LM5085 data sheet for a procedure to account for ripple cur-
rent amplitude and tolerances when selecting the resistor for
the ADJ pin.
B) Q1 R
to use the R
jumpers at both JP1 and JP2 from the A-B position to the B-
C position. This change connects the ADJ pin resistor (R3)
and the ISEN pin across Q1. Since the sense resistance is
now the R
for the Si7465 PFET lists the typical R
V
(ON)
achieve the same nominal current limit threshold as above
(7.64A), using Equation 6 in the data sheet R3 calculates to:
GS
is estimated to be nominally 57 mΩ at V
= 10V, and 64 mΩ at V
DS(ON)
DS(ON)
DS(ON)
method – To configure the evaluation board
of Q1, R3 must be changed. The data sheet
I
CL
of Q1 for current limit detection, move the
= 40 µA x R3/R5
GS
= 4.5V. Therefore, the R
DS(ON)
GS
as 51 mΩ at
= 7.7V. To
(1)
DS
3
The load current is equal to the current limit threshold minus
half the current ripple amplitude. R3 can be changed to set
other current limit detection thresholds.
Output Ripple Control
The LM5085 requires a minimum of 25 mVp-p ripple at the
FB pin, in phase with the switching waveform at the SW node,
for proper operation. On this evaluation board, the required
ripple is generated by R7, C9, and C10, allowing the ripple at
V
Alternatively, the required ripple at the FB pin can be supplied
from ripple generated at V
back resistors, as described in options B and C below, using
one or two less external components.
A) Minimum Output Ripple: This evaluation board is sup-
plied configured for minimum ripple at V
nents R7, C9 and C10. The ripple voltage required by the FB
pin is generated by R7 and C10 since the SW node switches
from
The values for R7 and C10 are chosen to generate a 25-40
mVp-p triangle waveform at their junction. That triangle wave
is then coupled to the FB pin through C9. The following pro-
cedure is used to calculate values for R7, C9 and C10:
1) Calculate the voltage V
where V
during the off-time, typically 0.5V to 1V depending on the
diode, and V
value of 0.65V for V
approximate DC voltage at the R7/C10 junction, and is used
in the next equation.
2) Calculate the R7xC10 product:
where t
imum input voltage, and ΔV is the desired ripple amplitude at
the R7/C10 junction, 25 mVp-p for this example.
R7 and C10 are then chosen from standard value compo-
nents to satisfy the above product. On this evaluation board,
C10 is set at 3300 pF. R7 calculate to be 23.6 kΩ, and a stan-
dard value 23.2 kΩ resistor is used. C9 is chosen to be 0.01
µF, large compared to C10. The circuit as supplied on this
EVB is shown in Figure 4.
The output ripple, which ranges from
to
of the output capacitance (C6, C7), and the inductor’s ripple
current, which ranges from 116 mAp-p to 1190 mAp-p over
the input voltage range. See Figure 11.
OUT
≊
54 mVp-p at V
≊
to be kept to a minimum, as described in option A below.
-1V to V
ON
SW
is the maximum on-time (
V
is the absolute value of the voltage at the SW node
A
IN
= V
IN
is the minimum input voltage. Using a typical
, and the right end of C10 is a virtual ground.
OUT
IN
= 55V, is determined primarily by the ESR
SW
- (V
, V
SW
A
OUT
A
:
x (1 - (V
calculates to 4.94V. This is the
and passed through the feed-
≊
≊
OUT
3479 ns), V
14 mVp-p at V
OUT
/V
IN(min)
by using compo-
)))
IN
www.national.com
is the min-
IN
= 5.5V