POEPHYTEREV-I National Semiconductor, POEPHYTEREV-I Datasheet - Page 46
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
POEPHYTEREV-I
Manufacturer Part Number
POEPHYTEREV-I
Description
BOARD EVAL LM5072, DP83848I
Manufacturer
National Semiconductor
Series
PHYTER®r
Datasheets
1.DP83848IVVNOPB.pdf
(84 pages)
2.LM5072MHX-50NOPB.pdf
(26 pages)
3.DP83848C-MAU-EK.pdf
(18 pages)
Specifications of POEPHYTEREV-I
Main Purpose
Special Purpose DC/DC, Power Over Ethernet
Outputs And Type
1, Isolated
Power - Output
24W
Voltage - Output
3.3V
Current - Output
7.3A
Voltage - Input
39 ~ 57V
Regulator Topology
Flyback
Frequency - Switching
250kHz
Board Type
Fully Populated
Utilized Ic / Part
DP83848, LM5072
Lead Free Status / RoHS Status
Not applicable / Not applicable
www.national.com
Bit
4:0
11
10
9
8
7
6
5
Table 16. Negotiation Advertisement Register (ANAR), address 0x04 (Continued)
ASM_DIR
Bit Name
Selector
PAUSE
TX_FD
10_FD
TX
T4
10
<00001>, RW
Strap, RW
Strap, RW
Strap, RW
Strap, RW
0, RO/P
Default
0, RW
0, RW
Asymmetric PAUSE Support for Full Duplex Links:
The ASM_DIR bit indicates that asymmetric PAUSE is supported.
Encoding and resolution of PAUSE bits is defined in IEEE 802.3
Annex 28B, Tables 28B-2 and 28B-3, respectively. Pause resolu-
tion status is reported in PHYCR[13:12].
1 = Advertise that the DTE (MAC) has implemented both the op-
tional MAC control sublayer and the pause function as specified in
clause 31 and annex 31B of 802.3u.
0= No MAC based full duplex flow control.
PAUSE Support for Full Duplex Links:
The PAUSE bit indicates that the device is capable of providing the
symmetric PAUSE functions as defined in Annex 31B.
Encoding and resolution of PAUSE bits is defined in IEEE 802.3
Annex 28B, Tables 28B-2 and 28B-3, respectively. Pause resolu-
tion status is reported in PHYCR[13:12].
1 = Advertise that the DTE (MAC) has implemented both the op-
tional MAC control sublayer and the pause function as specified in
clause 31 and annex 31B of 802.3u.
0= No MAC based full duplex flow control.
100BASE-T4 Support:
1= 100BASE-T4 is supported by the local device.
0 = 100BASE-T4 not supported.
100BASE-TX Full Duplex Support:
1 = 100BASE-TX Full Duplex is supported by the local device.
0 = 100BASE-TX Full Duplex not supported.
100BASE-TX Support:
1 = 100BASE-TX is supported by the local device.
0 = 100BASE-TX not supported.
10BASE-T Full Duplex Support:
1 = 10BASE-T Full Duplex is supported by the local device.
0 = 10BASE-T Full Duplex not supported.
10BASE-T Support:
1 = 10BASE-T is supported by the local device.
0 = 10BASE-T not supported.
Protocol Selection Bits:
These bits contain the binary encoded protocol selector supported
by this port. <00001> indicates that this device supports IEEE
802.3u.
46
Description