MAX15005AEVKIT+ Maxim Integrated Products, MAX15005AEVKIT+ Datasheet - Page 9

• Manufacturer Part Number: MAX15005AEVKIT+
• Description: KIT EVAL FOR MAX15005A
• Manufacturer: Maxim Integrated Products

Specifications of MAX15005AEVKIT+

• Main Purpose: DC/DC, Step Up or Down
• Outputs And Type: 3, Isolated
• Voltage - Output: 3V, 110V, 60V
• Current - Output: 650mA, 55mA, 12mA
• Voltage - Input: 6.5 ~ 16V
• Regulator Topology: Flyback
• Frequency - Switching: 100kHz
• Board Type: Fully Populated
• Utilized Ic / Part: MAX15005A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIN
10
11
12
13
14
15
16
—
1
2
3
4
5
6
7
8
9
Flyback/Boost/SEPIC Power-Supply Controllers
ON/OFF
SLOPE
NAME
SGND
COMP
PGND
SYNC
REG5
RTCT
OUT
N.C.
V
OVI
CS
SS
FB
EP
IN
CC
_______________________________________________________________________________________
Input Power Supply. Bypass IN with a minimum 0.1μF ceramic capacitor to PGND.
ON/OFF Input. Connect ON/OFF to IN for always-on operation. To externally program the UVLO threshold of the
IN supply, connect a resistive divider between IN, ON/OFF, and SGND. Pull ON/OFF to SGND to disable the
controller.
Overvoltage Comparator Input. Connect a resistive divider between the output of the power supply, OVI, and
SGND to set the output overvoltage threshold.
Programmable Slope Compensation Capacitor Input. Connect a capacitor (C
of slope compensation.
Slope compensation = (2.5 x 10
No Connection. Not internally connected.
Oscillator-Timing Network Input. Connect a resistor from RTCT to REG5 and a capacitor from RTCT to SGND to
set the oscillator frequency (see the Oscillator Frequency/External Synchronization section).
Signal Ground. Connect SGND to SGND plane.
External-Clock Synchronization Input. Connect SYNC to SGND when not using an external clock.
Soft-Start Capacitor Input. Connect a capacitor from SS to SGND to set the soft-start time interval.
Internal Error-Amplifier Inverting Input. The noninverting input is internally connected to SS.
Error-Amplifier Output. Connect the frequency compensation network between FB and COMP.
Current-Sense Input. The current-sense signal is compared to a signal proportional to the error-amplifier output
voltage.
5V Low-Dropout Regulator Output. Bypass REG5 with a 1μF ceramic capacitor to SGND.
Power Ground. Connect PGND to the power ground plane.
Gate Driver Output. Connect OUT to the gate of the external n-channel MOSFET.
7.4V Low-Dropout Regulator Output—Driver Power Source. Bypass V
capacitors to PGND.
Exposed Pad (MAX15004A/MAX15005A only). Connect EP to the SGND plane to improve thermal performance.
Do not use the EP as an electrical connection.
4.5V to 40V Input Automotive
-9
) / C
SLOPE
mV/μs with C
FUNCTION
SLOPE
in farads.
CC
with 0.1μF and 1μF or higher ceramic
SLOPE
) to SGND to set the amount
Pin Description
9