MAX15023EVKIT+ Maxim Integrated Products, MAX15023EVKIT+ Datasheet - Page 19

• Manufacturer Part Number: MAX15023EVKIT+
• Description: KIT EVALUATION FOR MAX15023 CTLR
• Manufacturer: Maxim Integrated Products

Specifications of MAX15023EVKIT+

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 2, Non-Isolated
• Voltage - Output: 1.2V, 3.3V
• Current - Output: 10A, 5A
• Voltage - Input: 9 ~ 16V
• Regulator Topology: Buck
• Frequency - Switching: 500kHz
• Board Type: Fully Populated
• Utilized Ic / Part: MAX15023
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The output voltage ripple as a consequence of the ESR
and the output capacitance is:
where ∆I
(see the Inductor Selection section). These equations
are suitable for initial capacitor selection, but final val-
ues should be verified by testing in a prototype or eval-
uation circuit.
As a general rule, a smaller inductor ripple current
results in less output ripple voltage. The output capaci-
tor must be also checked against load-transient
response requirements. The allowable deviation of the
output voltage during fast load transients also deter-
mines the output capacitance, its ESR, and its equiva-
lent series inductance (ESL). The output capacitor
supplies the load current during a load step until the
controller responds with a greater duty cycle. The
response time (t
loop bandwidth of the converter (see the Compensation
section). The resistive drop across the output capaci-
tor’s ESR, the drop across the capacitor’s ESL (∆V
and the capacitor discharge causes a voltage droop
during the load step.
Use a combination of low-ESR tantalum/aluminum elec-
trolytic or polymer and ceramic capacitors for better
transient load and voltage ripple performance. Non-
leaded capacitors and capacitors in parallel help
reduce the ESL. Keep the maximum output voltage
deviation below the tolerable limits of the load. Use the
following equations to calculate the required ESR, ESL,
and capacitance value during a load step:
where I
load step, t
troller, and f
STEP
L
is the peak-to-peak inductor current ripple
RESPONSE
O
is the load step, t
is the closed-loop crossover frequency.
ESR
ESL
C
t
RESPONSE
∆
∆
∆
OUT
V
V
I
L
RESPONSE
ESR
Q
______________________________________________________________________________________
=
=
=
=
=
∆
(
∆
I
V
STEP
=
8
V
V
is the response time of the con-
IN
I
STEP
ESL
ESR
×
∆
V
I
I
−
C
STEP
IN
L
≅
V
OUT
×
×
OUT
) depends on the closed-
∆
3
×
Wide 4.5V to 28V Input, Dual-Output
×
ESR
t
I
STEP
×
L
f
∆
STEP
t
1
SW
RESPONSE
V
f
O
×
)
Q
×
f
SW
×
is the rise time of the
V
L
OUT
Synchronous Buck Controller
ESL
),
Each channel of the MAX15023 provides an internal
transconductance amplifier with its inverting input and
its output available to the user for external frequency
compensation. The flexibility of external compensation
for each converter offers wide selection of output filter-
ing components, especially the output capacitor. For
cost-sensitive applications, use low-ESR aluminum
electrolytic capacitors; for component-size sensitive
applications, use low-ESR tantalum, polymer, or ceram-
ic capacitors at the output. The high switching frequen-
cy of the MAX15023 allows use of ceramic capacitors
at the output. Choose the small-signal components for
the error amplifier to achieve the desired closed-loop
bandwidth and phase margin.
To choose the appropriate compensation network type,
the power-supply poles and zeros, the zero crossover
frequency, and the type of the output capacitor must be
determined.
In a buck converter, the LC filter in the output stage
introduces a pair of complex poles at the following fre-
quency:
The output capacitor and its ESR also introduce a zero
at:
The loop-gain crossover frequency (f
gain equals 1 (0dB)) should be set below 1/10 the
switching frequency:
Choosing a lower crossover frequency might also help
in reducing the effects of noise pickup into the feed-
back loop, such as jittery duty cycle.
In order to maintain a stable system, two stability crite-
ria must be met:
1) The phase shift at the crossover frequency f
2) The gain at the frequency where the phase shift is
be less than 180°. In other words, the phase margin
of the loop must be greater than zero.
-180° (gain margin) must be less than 1.
f
PO
f
ZO
=
=
2π
2π
×
f
O
×
≤
L
ESR C
OUT
f
SW
10
1
1
×
×
C
OUT
OUT
Compensation
O
, where the loop
O
, must
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