DAC121C08XEB/NOPB National Semiconductor, DAC121C08XEB/NOPB Datasheet - Page 4

• Manufacturer Part Number: DAC121C08XEB/NOPB
• Description: BOARD EVAL FOR DAC121C081/5
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DAC121C08XEB/NOPB

• Number Of Dac's: 1
• Number Of Bits: 12
• Outputs And Type: 1, Single Ended
• Data Interface: Serial
• Settling Time: 6µs
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 125°C
• Utilized Ic / Part: DAC121C081/5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DAC121C08XEB

2.0 Board Assembly
The DAC121C08XEB evaluation board comes
fully assembled and ready for use. Refer to the Bill
of Materials for a description of components, to
Figure 1 for major component placement, and to
Figure 12 for the Evaluation Board schematic.
3.0 Quick Start
The evaluation board may be used in the Stand-
Alone mode or Computer mode. In Stand-Alone
mode, a Pattern Generator is used to interface to
the DAC’s I
WaveVision4 Board is used to drive the DAC’s I
interface. In either case, a Signal Analyzer is used
to evaluate the analog output signal.
3.1 Stand-Alone Mode
Refer to Figure 1 for locations of test points and
major components.
1. Connect a clean analog (not switching) +5V
2. Make
3. Turn on the power source.
4. Configure a pattern generator or other I
5. Connect the I
power source to Power Connector J2 on the
DAC121C08XEB board. Ground the middle
terminal and connect +5V to the bottom
terminal closest to JP9.
connections, see Table 1 for more details:
master
DAC121C085. Refer to the timing diagrams
in the datasheet for further timing details. The
DAC supports any of the three standard I
speed ranges. Ensure the I
is configured to drive 5V CMOS logic.
Interface Header J3 (WV4). Refer to Figure 2
below for connection details.
board comes with pull-up resistors (R6 and
R7). Any other pull-ups on the I
be disabled.
• JP9 - pins 2 & 3
• JP7 - pins 2 & 3
• JP6 - pins 1 & 2
• JP8 - pins 1 & 2
2
the
C Interface. In Computer Mode, a
device
following
2
C master device to Serial
to
interface
required
2
C master device
NOTE:
2
C bus must
to
jumper
The
the
2
2
2
C
C
C
4
6. The Analog Output signal can be seen DC
7. Select the desired output load by adding
8. The DAC121C085 will respond to I
coupled at J5, or AC coupled at SMA
connector J4. See the board schematic of
Figure 12 for details.
jumpers to JP4. Connect a jumper across the
two left pins near the “C” to add a 200pF load
capacitance to ground.
across the two right side pins near the “R” to
add a 2kΩ resistive load. See Table 1 for
jumper configurations.
0x0C by default with pins A0 and A1 floating.
Change the I
adding jumpers to JP5. A0 is controlled by
pins 1,2, & 3 of JP5. A1 is controlled by pins
5, 6, & 7. Refer to Table 1 for a detailed
description of the I
NOTE: Jumper Setting changes to the pin-
configurable slave address will not take effect
until the DAC is power-cycled.
Figure 2: J3 (WV4) Interface Header
SDA
SCL
2
C slave address of the DAC by
http://www.national.com
14
12
10
8
6
4
2
2
WV4
C Slave address settings.
J3
13
11
9
7
5
3
1
Connect a jumper
2
C address