EVAL-AD7150EBZ Analog Devices Inc, EVAL-AD7150EBZ Datasheet - Page 18

BOARD EVAL FOR AD7150

EVAL-AD7150EBZ

Manufacturer Part Number
EVAL-AD7150EBZ
Description
BOARD EVAL FOR AD7150
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD7150EBZ

Sensor Type
Touch, Capacitive
Interface
I²C
Voltage - Supply
2.7 V ~ 3.6 V
Embedded
No
Utilized Ic / Part
AD7150
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Sensing Range
-
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EVAL-AD7150EBZ
Manufacturer:
Analog Devices Inc
Quantity:
135
AD7150
SETUP REGISTERS
Ch1 Address Pointer 0x0B
Ch2 Address Pointer 0x0E
8 Bits, Read/Write, Factory Preset 0x0B
Table 10. Setup Registers Bit Map
Bit
Mnemonic
Default
Table 11. Setup Registers Bit Descriptions
Bit
7
6
5
4
3
2
1
0
Mnemonic
RngH
RngL
Hyst
ThrSettling
Description
Range bits set the CDC input range and determine the step for the AutoDAC function.
This bit should be 0 for the specified operation.
Hyst = 1 disables hysteresis in adaptive threshold mode. This bit has no effect in fixed threshold mode;
hysteresis is always disabled in the fixed threshold mode.
Determines the settling time constant of the data average and thus the settling time of the adaptive thresholds.
The response of the average to an input capacitance step change (that is, response to the change in the CDC
output data) is an exponential settling curve characterized by the following equation:
where:
Average(N) is the value of average N complete CDC conversion cycles after a step change on the input.
Average(0) is the value before the step change.
TimeConst can be selected in the range between 2 and 65,536 conversion cycle multiples, in steps of power of
2, by programming the ThrSettling bits.
See Figure 41.
RngH
Bit 7
RngH
0
TimeConst
Average
0
0
1
1
INPUT CAPACITANCE
(CDC DATA) CHANGE
(
N
RngL
)
=
Bit 6
Figure 41. Data Average Response to Data Step Change
=
0
2
(
Average
ThrSettlin
RngL
0
1
0
1
g
+
) 1
(
) 0
Bit 5
Rev. 0 | Page 18 of 28
0
+
Change
Capacitive Input Range (pF)
1 (
Bit 4
Hyst
DATA AVERAGE RESPONSE
0
e
N
0.5
/ TimeConst
2
1
4
)
Bit 3
TIME
ThrSettling (4-Bit Value)
Bit 2
AutoDAC Step (CAPDAC LSB)
0x0B
Bit 1
4
1
2
8
Bit 0

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