XE8000EV108 Semtech, XE8000EV108 Datasheet - Page 37

• Manufacturer Part Number: XE8000EV108
• Description: EVAL BOARD FOR XE8806/XE8807
• Manufacturer: Semtech
• Type: MCUr

Specifications of XE8000EV108

• Contents: Fully Assembled Evaluation Board
• For Use With/related Products: XE88LC06AMI026
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Another reset source is the bit Sleep in the RegSysReset register. This source is fully controlled by software and is
only used during the sleep mode.
Four internal reset signals are generated from these sources and distributed through the system:
Table 6-5 shows a summary of the dependency of the internal reset signals on the various reset sources.
6.5
6.5.1
The power on reset (POR) monitors the external supply voltage. It activates a reset on a rising edge of this supply
voltage. The reset is inactivated only if the internal voltage regulator has started up. The POR block performs no
precise voltage level detection.
6.5.2
Applying a low input state on the NRESET pin can activate the reset.
6.5.3
Port A (if present in the product) can generate a reset signal. See the description of the Port A for further
information.
6.5.4
The Watchdog will generate a reset if the
watchdog is not cleared in time by the processor. See chapter 6.8 describing the watchdog for further information.
© Semtech 2006
In all the tables describing the different registers, the reset source is indicated.
Asserted
reset source
POR
NRESET pin
PortA input
Watchdog
BusError
Sleep
Reset source description
• nresetcold:
• nresetglobal: is asserted when nresetcold or any other enabled reset source is active
• nresetsleep: is asserted when the circuit is in sleep mode
• nresetpconf: is asserted when nresetglobal is active and if the
register is set. This reset is generally used in the different ports. It allows to maintain the port configuration
unchanged while the rest of the circuit is reset.
Power On Reset
NRESET pin
Programmable Port A input combination
Watchdog reset
nresetglobal
Asserted
Asserted
Asserted
Asserted
Asserted
is asserted on POR or by the NRESET pin
-
Table 6-5. Internal reset assertion as a function of the reset source.
EnResetPConf
is set to 0
Asserted
Asserted
when
-
-
-
-
EnResetWD
nresetpconf
Internal reset signals
EnRestPConf
6-4
bit in the RegSysCtrl register has been set and if the
is set to 1
Asserted
Asserted
Asserted
Asserted
Asserted
when
-
nresetsleep
Asserted
Asserted
Asserted
EnResetPConf bit in the
-
-
-
XE8806A/XE8807A
nresetcold
Asserted
Asserted
-
-
-
-
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RegSysCtrl