C8051F996-TB Silicon Laboratories Inc, C8051F996-TB Datasheet - Page 18
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C8051F996-TB
Manufacturer Part Number
C8051F996-TB
Description
DEV KIT FOR C8051F999/F998
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F996-TB.pdf
(24 pages)
Specifications of C8051F996-TB
Contents
Board
Processor Series
C8051F9x
Data Bus Width
8 bit
Interface Type
USB, UART
Core
8051
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F98, C8051F99
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1986
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F996-TB
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
C8051F996-DK
7.7. Target Board DEBUG Interface (J9)
The DEBUG connector J9 provides access to the DEBUG (C2) pins of the C8051F996. It is used to connect the
Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.
Table 4 shows the DEBUG pin definitions.
7.8. Serial Interface (J12)
A USB-to-UART bridge circuit (U3) and USB connector (P3) are provided on the target board to facilitate serial
connections to UART0 of the C8051F996. The Silicon Labs CP2103 (U3) USB-to-UART bridge provides data
connectivity between the C8051F996 and the PC via a USB port. The VIO power supply and TX, RX, RTS and
CTS signals of UART0 may be connected to the CP2103 by installing shorting blocks on header J12. The shorting
block positions for connecting each of these signals to the CP2103 are listed in Table 5. To use this interface, the
USB-to-UART device drivers should be installed as described in 4.3. "CP210x USB to UART VCP Driver
Installation‚" on page 3.
7.9. Analog I/O (H1)
Several of the C8051F996 target device’s port pins are connected to the H1 terminal block. Refer to Table 6 for the
H1 terminal block connections.
18
Table 5. Serial Interface Header (J12) Description
Table 4. DEBUG Connector Pin Descriptions
Table 6. H1 Terminal Block Pin Descriptions
Header Pins UART0 Pin Description
2, 3, 9
Pin #
Pin #
J12[9–10]
J12[7–8]
J12[5–6]
J12[3–4]
J12[1–2]
10
1
4
5
6
7
8
1
2
3
4
P0.0/V
USB Power (+5 VDC from J9)
+3 VD (+3.3 VDC)
REF
Rev. 0.1
Not Connected
GND (Ground)
P0.6/CNVSTR
GND (Ground)
Description
CP2103_VIO (VDD)
Description
RST (Reset)
P0.7/IREF0
RST/C2CK
P2.7/C2D
TX_MCU (P0.5)
RX_MCU (P0.4)
(Voltage Reference)
P2.7
RTS (P0.6)
CTS (P0.7)