C8051F005DK Silicon Laboratories Inc, C8051F005DK Datasheet - Page 82

• Manufacturer Part Number: C8051F005DK
• Description: DEV KIT FOR F005/006/007
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F005DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F01x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F005
• Silicon Family Name: C8051F00x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F005/006/007
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1188

Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
EXVLD
R/W
Bit7
This bit sets the masking of the XTLVLD interrupt.
0: Disable all XTLVLD interrupts.
1: Enable interrupt requests generated by the XTLVLD flag (OSCXCN.7)
This bit sets the masking of External Interrupt 7.
0: Disable External Interrupt 7.
1: Enable interrupt requests generated by the External Interrupt 7 input pin.
This bit sets the masking of External Interrupt 6.
0: Disable External Interrupt 6.
1: Enable interrupt requests generated by the External Interrupt 6 input pin.
This bit sets the masking of External Interrupt 5.
0: Disable External Interrupt 5.
1: Enable interrupt requests generated by the External Interrupt 5 input pin.
This bit sets the masking of External Interrupt 4.
0: Disable External Interrupt 4.
1: Enable interrupt requests generated by the External Interrupt 4 input pin.
EADC0: Enable ADC0 End of Conversion Interrupt.
This bit sets the masking of the ADC0 End of Conversion Interrupt.
0: Disable ADC0 Conversion Interrupt.
1: Enable interrupt requests generated by the ADC0 Conversion Interrupt.
This bit sets the masking of the Timer 3 interrupt.
0: Disable all Timer 3 interrupts.
1: Enable interrupt requests generated by the TF3 flag (TMR3CN.7)
EXVLD: Enable External Clock Source Valid (XTLVLD) Interrupt.
Reserved. Must Write 0. Reads 0.
EX7: Enable External Interrupt 7.
EX6: Enable External Interrupt 6.
EX5: Enable External Interrupt 5.
EX4: Enable External Interrupt 4.
ET3: Enable Timer 3 Interrupt.
R/W
Bit6
-
Figure 10.12. EIE2: Extended Interrupt Enable 2
EX7
R/W
Bit5
EX6
R/W
Bit4
Rev. 1.7
EX5
R/W
Bit3
EX4
R/W
Bit2
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
EADC0
R/W
Bit1
R/W
ET3
Bit0
SFR Address:
Reset Value
00000000
0xE7
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