C8051F226-TB Silicon Laboratories Inc, C8051F226-TB Datasheet - Page 71

• Manufacturer Part Number: C8051F226-TB
• Description: BOARD PROTOTYPING W/C8051F226
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F226-TB

• Contents: Board
• Processor To Be Evaluated: C8051F22x and C8051F23x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F226
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.3.1. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved
bits should be set to logic 0. Future product versions may use these bits to implement new features in
which case the reset value of the bit will be logic 0, selecting the feature’s default state. Detailed descrip-
tions of the remaining SFRs are included in the sections of the datasheet associated with their correspond-
ing system function.
Bits 7–0: SP: Stack Pointer. 
Bits 7–0: DPL: Data Pointer Low. 
Bits 7–0: DPH: Data Pointer High. 
R/W
R/W
R/W
Bit7
Bit7
Bit7
The stack pointer holds the location of the top of the stack. The stack pointer is incremented
before every PUSH operation. The SP register defaults to 0x07 after reset.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed RAM.
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed RAM.
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 9.3. DPH: Data Pointer High Byte
SFR Definition 9.2. DPL: Data Pointer Low Byte
R/W
R/W
R/W
Bit5
Bit5
Bit5
SFR Definition 9.1. SP: Stack Pointer
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.6
R/W
R/W
R/W
Bit3
Bit3
Bit3
R/W
R/W
R/W
Bit2
Bit2
Bit2
R/W
R/W
R/W
Bit1
Bit1
Bit1
C8051F2xx
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
Reset Value
Reset Value
Reset Value
00000111
00000111
00000111
0x81
0x81
0x81
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