C8051F530A-TB Silicon Laboratories Inc, C8051F530A-TB Datasheet

BOARD TARGET/PROTO W/C8051F530A

C8051F530A-TB

Manufacturer Part Number
C8051F530A-TB
Description
BOARD TARGET/PROTO W/C8051F530A
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F530A-TB

Contents
Board
Processor To Be Evaluated
C8051F52xA and C8051F53xA
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F530A
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1489
Analog Peripherals
12-Bit ADC, 5 V input signal; up to 16 external inputs
-
-
-
-
Built-in Temperature Sensor (±3 °C)
Programmable Comparator
Precision Internal Voltage Reference
V
On-Chip Debug
-
-
-
-
Temperature Range: –40 to +125 °C
Operating Voltage: 1.8 to 5.25 V
-
Development Kit: C8051F530ADK
Automotive
DD
C2CK/RST
±1 LSB INL; guaranteed monotonic
Programmable throughput up to 200 ksps
Data-dependent windowed interrupt generator
Programmable gain maximizes input signal span
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watch-points
Inspect/modify memory, registers, and stack
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Multiple power saving sleep and shutdown modes
Monitor/Brown-out Detector
VREGIN
GND
VDD
Programming
C2D
Power On
Hardware
Voltage Regulator
XTAL1
XTAL2
Debug /
Reset
(LDO)
Reset
System Clock Setup
CIP-51 8051 Controller
External Oscillator
8 kB Flash Program
Internal Oscillator
256 Byte SRAM
Core (25 MHz)
(±0.5%)
Memory
Copyright © 2008 by Silicon Laboratories
25 MIPS, 8 kB Flash, 12-Bit ADC, 20-Pin Automotive MCU
SFR
Bus
High-Speed 8051 µC Core
-
-
Memory
-
-
LIN 2.1
-
Digital Peripherals
-
-
-
-
Clock Sources
-
-
Ordering Part Numbers
-
-
VDD
Timers 0,
Pipelined instruction architecture; executes 70% of instructions in one or
two system clocks
Up to 25 MIPS throughput
8 kB Flash; in-system programmable; flexible security features
256 bytes data RAM
Master or slave operation using dedicated hardware
Up to 16 digital I/O; all are 5 V push-pull
SPI™ and UART serial ports available concurrently
Programmable 16-bit counter array with three capture/compare modules
Three general-purpose 16-bit counter/timers
Internal programmable 0.5% oscillator: Up to 25 MHz
External oscillator: Crystal, RC, C, or CMOS Clock
C8051F530A-IT, 20-Pin TSSOP (RoHS-compliant), 6x6 mm
C8051F530A-IM, 20-Pin QFN (RoHS-compliant), 4 x 4 mm
3 Channel
PCA/WDT
UART0
LIN 2.1
12-bit
200ksps
ADC
Analog Peripherals
Digital Peripherals
1, 2
SPI
Port I/O Configuration
CP0, CP0A
Crossbar Control
Reference
Voltage
VREF
Comparator
M
A
U
X
+
VREF
Crossbar
-
Decoder
Priority
VDD
VREF
Sensor
GND
Temp
C8051F530A
Drivers
Drivers
Port 0
Port 1
VREGIN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6/C2D
P0.7/XTAL1
P1.0/XTAL2
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
11.20.2008
2
2

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