PIC12F675/ICD Microchip Technology, PIC12F675/ICD Datasheet - Page 25
PIC12F675/ICD
Manufacturer Part Number
PIC12F675/ICD
Description
IC MCU 1K FLASH DEVLP TOOL 14DIP
Manufacturer
Microchip Technology
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F675/ICD
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3.3.3
Figure 3-2 shows the diagram for this pin. The GP2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• the clock input for TMR0
• an external edge triggered interrupt
• a digital output from the comparator
FIGURE 3-2:
2010 Microchip Technology Inc.
TRISIO
Data Bus
PORT
PORT
Interrupt-on-Change
WPU
WPU
TRISIO
IOC
IOC
WR
WR
WR
WR
RD
RD
RD
RD
D
D
D
D
To TMR0
To INT
To A/D Converter
CK
CK
CK
CK
GP2/AN2/T0CKI/INT/COUT
Q
Q
Q
Q
Q
Q
Q
Q
Input Mode
BLOCK DIAGRAM OF GP2
Analog
Enable
COUT
COUT
GPPU
Input Mode
Analog
RD PORT
1
0
Q
Q
Analog
Mode
Input
EN
EN
D
D
V
DD
Weak
V
V
DD
SS
I/O pin
3.3.4
Figure 3-3 shows the diagram for this pin. The GP3 pin
is configurable to function as one of the following:
• a general purpose input
• as Master Clear Reset
FIGURE 3-3:
Data Bus
PORT
Interrupt-on-Change
IOC
TRISIO
IOC
WR
RD
RD
RD
D
CK
GP3/MCLR/V
PIC12F629/675
Q
Q
Reset
BLOCK DIAGRAM OF GP3
V
SS
PP
RD PORT
MCLRE
Q
Q
MCLRE
EN
EN
DS41190G-page 25
D
D
V
SS
I/O pin
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