AD9430-LVDS/PCB Analog Devices Inc, AD9430-LVDS/PCB Datasheet - Page 7

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AD9430-LVDS/PCB

Manufacturer Part Number
AD9430-LVDS/PCB
Description
BOARD EVAL FOR AD9430-LVDS
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9430-LVDS/PCB

Rohs Status
RoHS non-compliant
Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
210M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
1.5 Vpp
Power (typ) @ Conditions
1.5W @ 210MSPS
Voltage Supply Source
Single
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9430
DIGITAL SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, T
Table 3.
Parameter
ENCODE AND DS INPUTS
(CLK+, CLK–, DS+, DS–)
LOGIC INPUTS (S1, S2, S4, S5)
LOGIC OUTPUTS (CMOS Mode)
LOGIC OUTPUTS (LVDS Mode)
1
2
3
4
5
ENCODE (Clock) and DS inputs identical on the chip. See the
All ac specifications tested by driving CLK+ and CLK– differentially, |(CLK+) – (CLK–)| > 200 mV.
ENCODE (Clock) inputs’ common-mode can be externally set, such that 0.9 V < (CLK+ or CLK−) < 2.6 V.
Digital output logic levels: DRVDD = 3.3 V, C
LVDS R
Differential Input Voltage
Common-Mode Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Input Current
Logic 0 Input Current
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
V
V
Output Coding
OD
OS
Output Offset Voltage
Differential Output Voltage
TERM
= 100 Ω, LVDS output current set resistor (R
4
4
1
3
2
4, 5
MIN
Temp
Full
Full
Full
LOAD
Full
Full
Full
25°C
Full
Full
25°C
25°C
Full
Full
Full
= –40°C, T
= 5 pF.
SET
) = 3.74 kΩ (1% tolerance).
MAX
Equivalent Circuits
Test
Level
IV
VI
VI
V
IV
IV
VI
VI
V
V
IV
IV
VI
VI
= +85°C, unless otherwise noted.
Rev. E | Page 7 of 44
Twos complement or binary
Min
0.2
1.375
3.2
2.0
DRVDD
–0.05
247
1.125
section.
AD9430-170
Typ
1.5
5.5
4
30
4
Max
1.575
6.5
0.8
190
10
0.05
454
1.375
Min
0.2
1.375
3.2
2.0
DRVDD
–0.05
247
1.125
Twos complement or binary
AD9430-210
Typ
1.5
5.5
4
30
4
Max
1.575
6.5
0.8
190
10
0.05
454
1.375
AD9430
Unit
V
V
pF
V
V
μA
μA
pF
V
V
mV
V

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