AD9773-EB Analog Devices Inc, AD9773-EB Datasheet - Page 38

• Manufacturer Part Number: AD9773-EB
• Description: BOARD EVAL FOR AD9773
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9773-EB

• Rohs Status: RoHS non-compliant
• Number Of Dac's: 2
• Number Of Bits: 12
• Outputs And Type: 2, Differential
• Sampling Rate (per Second): 160M
• Data Interface: Parallel
• Settling Time: 11ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9773

AD9773
ZERO STUFFING
(Control Register 01h, Bit 3)
As shown in Figure 75, a 0 or null in the output frequency
response of the DAC (after interpolation, modulation, and DAC
reconstruction) occurs at the final DAC sample rate (f
is due to the inherent SIN(x)/x roll-off response in the digital-
to-analog conversion. In applications where the desired
frequency content is below f
Note that at f
applications, this roll-off may be problematic due to the
increased pass-band amplitude variation as well as the reduced
amplitude of the desired signal.
Consider an application where the digital data into the AD9773
represents a baseband signal around f
f
experience only a 0.75 dB amplitude variation over its pass
band. However, the image of the same signal occurring at
3 × f
This image may be the desired signal in an IF application using
one of the various modulation modes in the AD9773. This roll-
off of image frequencies can be seen in Figure 59 to Figure 74,
where the effect of the interpolation and modulation rate is
apparent as well.
To improve upon the pass-band flatness of the desired image,
the zero stuffing mode can be enabled by setting the control
register bit to Logic 1. This option increases the ratio of
f
inserting a midscale sample (that is, 1000 0000 0000 0000) after
every data sample originating from the interpolation filter. This
is important as it affects the PLL divider ratio needed to keep
the VCO within its optimum speed range. Note that the zero
stuffing takes place in the digital signal chain at the output of
the digital modulator, before the DAC.
DAC
DAC
/10. The reconstructed signal out of the AD9773 would
/f
–10
–20
–30
–40
–50
DAC
10
DATA
0
f
OUT
Figure 75. Effect of Zero Stuffing on DAC’s SIN(x)/x Response
/4 suffers from a pass-band flatness variation of 3.93 dB.
0
, NORMALIZED TO
by a factor of 2 by doubling the DAC sample rate and
ZERO STUFFING
DAC
DISABLED
/2, the loss due to SIN(x)/x is 4 dB. In direct RF
0.5
f
DATA
DAC
WITH ZERO STUFFING DISABLED (Hz)
1.0
/2, this may not be a problem.
ZERO STUFFING
ENABLED
DAC
/4 with a pass band of
1.5
DAC
2.0
). This
Rev. D | Page 38 of 60
The net effect is to increase the DAC output sample rate by a
factor of 2× with the 0 in the SIN(x)/x DAC transfer function
occurring at twice the original frequency. A 6 dB loss in
amplitude at low frequencies is also evident, as can be seen in
Figure 76.
It is important to realize that the zero stuffing option by itself
does not change the location of the images but rather their
amplitude, pass-band flatness, and relative weighting. For
instance, in the previous example, the pass-band amplitude
flatness of the image at 3 × f
while the signal level has increased slightly from −10.5 dBFS to
−8.1 dBFS.
INTERPOLATING (COMPLEX MIX MODE)
(Control Register 01h, Bit 2)
In the complex mix mode, the two digital modulators on the
AD9773 are coupled to provide a complex modulation function.
In conjunction with an external quadrature modulator, this
complex modulation can be used to realize a transmit image
rejection architecture. The complex modulation function can
be programmed for e
rejection. As in the real modulation mode, the modulation
frequency ω can be programmed via the SPI port for f
f
OPERATIONS ON COMPLEX SIGNALS
Truly complex signals cannot be realized outside of a computer
simulation. However, two data channels, both consisting of real
data, can be defined as the real and imaginary components of a
complex signal. I (real) and Q (imaginary) data paths are often
defined this way. By using the architecture defined in Figure 76,
a system can be realized that operates on complex signals,
giving a complex (real and imaginary) output.
If a complex modulation function (e
imaginary components of the system correspond to the real and
imaginary components of e
shows, the complex modulation function can be realized by
applying these components to the structure of the complex
system defined in Figure 76.
DAC
/4, and f
a(t)
b(t)
DAC
Figure 76. Realization of a Complex System
/8, where f
INPUT
INPUT
COMPLEX FILTER
IMAGINARY
= (c + jd)
+jωt
OUTPUT
OUTPUT
or e
DAC
+jωt
DATA
−jωt
represents the DAC output rate.
or cosωt and sinωt. As Figure 77
to give upper or lower image
/4 is now improved to 0.59 dB
c(t) × b(t) + d × b(t)
b(t) × a(t) + c × b(t)
+jωt
) is desired, the real and
DAC
/2,