AD9866-EB Analog Devices Inc, AD9866-EB Datasheet - Page 10

• Manufacturer Part Number: AD9866-EB
• Description: BOARD EVAL FOR AD9866
• Manufacturer: Analog Devices Inc

Specifications of AD9866-EB

• Rohs Status: RoHS non-compliant

AD9866
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Pin No.
1
2 to 5
6
7
8, 9
10
11
12
13
14
15
Table 9. Pin Function Descriptions
TXCLK/TXQUIET
RXEN/RXSYNC
TXEN/TXSYNC
Mnemonic
ADIO11
Tx[5]
ADIO10 to 7
Tx[4 to 1]
ADIO6
Tx[0]
ADIO5
Rx[5]
ADIO4, 3
Rx[4, 3]
ADIO2
Rx[2]
ADIO1
Rx[1]
ADIO0
Rx[0]
RXEN
RXSYNC
TXEN
TXSYNC
TXCLK
TXQUIET
ADIO11/Tx[5]
ADIO10/Tx[4]
ADIO5/Rx[5]
ADIO4/Rx[4]
ADIO3/Rx[3]
ADIO2/Rx[2]
ADIO1/Rx[1]
ADIO0/Rx[0]
ADIO9/Tx[3]
ADIO8/Tx[2]
ADIO7/Tx[1]
ADIO6/Tx[0]
RXCLK
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
17
64
PIN 1
IDENTIFIER
18
63
19
Mode
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
62
20
61
Figure 2. Pin Configuration
Rev. A | Page 10 of 48
21
1
60
22
59
(Not to Scale)
AD9866
TOP VIEW
23
58
Description
MSB of ADIO Buffer
MSB of Tx Nibble Input
Bits 4 to 1 of Tx Nibble Input
Bit 6 of ADIO Buffer
LSB of Tx Nibble Input
Bit 5 of ADIO Buffer
MSB of Rx Nibble Output
Bits 4 to 3 of ADIO Buffer
Bits 4 to 3 of Rx Nibble Output
Bit 2 of ADIO Buffer
Bit 2 of Rx Nibble Output
Bit 1 of ADIO Buffer
Bit 1 of Rx Nibble Output
LSB of ADIO Buffer
LSB of Rx Nibble Output
ADIO Buffer Control Input
Rx Data Synchronization Output
Tx Path Enable Input
Tx Data Synchronization Input
ADIO Sample Clock Input
Fast TxDAC/IAMP Power-Down
Bits 10 to 7 of ADIO Buffer
24
57
25
56
26
55
27
54
28
53
29
52
30
51
31
50
32
49
36
48
47
46
45
44
43
42
41
40
39
38
37
35
34
33
AVSS
AVSS
IOUT_N–
IOUT_G–
AVSS
AVDD
REFIO
REFADJ
AVDD
AVSS
RX+
RX–
AVSS
AVDD
AVSS
REFT