AD5172EVAL Analog Devices Inc, AD5172EVAL Datasheet
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AD5172EVAL
Specifications of AD5172EVAL
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AD5172EVAL Summary of contents
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FEATURES 2-channel, 256-position potentiometers One-time programmable (OTP) set-and-forget resistance setting provides a low cost alternative to EEMEM Unlimited adjustments prior to OTP activation OTP overwrite allows dynamic adjustments with user- defined preset End-to-end resistance: 2.5 kΩ, 10 kΩ, 50 kΩ, ...
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AD5172/AD5173 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagrams ............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Electrical Characteristics: 2.5 kΩ ............................................... 3 Electrical Characteristics: 10 kΩ, 50 kΩ, and 100 ...
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SPECIFICATIONS ELECTRICAL CHARACTERISTICS: 2.5 kΩ ± 10 ± 10 Table 1. Parameter DC CHARACTERISTICS—RHEOSTAT MODE 2 Resistor Differential Nonlinearity 2 Resistor Integral Nonlinearity 3 Nominal Resistor Tolerance Resistance ...
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AD5172/AD5173 Parameter V Settling Time W Resistor Noise Voltage Density 1 Typical specifications represent average readings at 25°C and V 2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the ...
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Parameter POWER SUPPLIES Power Supply Range 9, 10 OTP Supply Voltage Supply Current OTP Supply Current 9, 11 Power Dissipation Power Supply Sensitivity 14 DYNAMIC CHARACTERISTICS Bandwidth, −3 dB Total Harmonic Distortion V Settling Time W Resistor Noise ...
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AD5172/AD5173 TIMING CHARACTERISTICS ± 10 ± 10 Table 3. Parameter INTERFACE TIMING CHARACTERISTICS SCL Clock Frequency Bus-Free Time Between Stop and Start, t Hold Time ...
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ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND GND Terminal Current Bx Wx Pulsed Continuous ...
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AD5172/AD5173 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD5172 TOP VIEW (Not to Scale) GND Figure 4. AD5172 Pin Configuration Table 5. AD5172 Pin Function Descriptions Pin ...
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TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.5 1 2. 5.5V DD –0.5 –1.0 –1.5 –2 128 160 CODE (DECIMAL) Figure 6. R-INL vs. Code vs. Supply Voltages 0.5 0.4 0.3 0.2 ...
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AD5172/AD5173 2 –40°C, +25°C, +85°C, +125°C A 1.0 0 5.5V DD –0 –40°C, +25°C, +85°C, +125°C A –1.0 –1.5 –2 128 160 CODE (DECIMAL) ...
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–40°C TO +85°C, –40°C TO +125° – 5. –40°C TO +85°C, –40°C TO +125°C A –20 – 128 ...
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AD5172/AD5173 5. 2.7V DD 0.01 0 0.5 1.0 1.5 2.0 2.5 3.0 DIGITAL INPUT VOLTAGE (V) Figure 24. Supply Current vs. Digital Input Voltage V W SCL Figure 25. Digital Feedthrough V ...
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T CHANNEL 1 MAXIMUM: 103mA CHANNEL 1 MINIMUM: –1.98mA 1 CH1 20.0mA M 200ns A CH1 T 588.000ns Figure 30. OTP Program Energy for Single Fuse 32.4mA Rev Page AD5172/AD5173 ...
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AD5172/AD5173 TEST CIRCUITS Figure 31 to Figure 38 illustrate the test circuits that define the test conditions used in the product specification tables (see Table 1 and Table 2). DUT 1LSB = V+/ ...
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THEORY OF OPERATION SCL SDA The AD5172/AD5173 are 256-position, digitally controlled variable resistors (VRs) that employ fuse link technology to achieve memory retention of the resistance setting. An internal power-on preset places the wiper at midscale during power-on. If the ...
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AD5172/AD5173 RDAC S LATCH AND DECODER Figure 41. AD5172/AD5173 Equivalent RDAC Circuit The general equation that determines the digitally programmed output resistance between W and ...
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ESD PROTECTION All digital inputs, SDA, SCL, AD0, and AD1, are protected with a series input resistor and parallel Zener ESD structures, as shown in Figure 43 and Figure 44. 340Ω LOGIC GND Figure 43. ESD Protection of Digital Pins ...
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AD5172/AD5173 LAYOUT CONSIDERATIONS In PCB layout good practice to employ compact, minimum lead length design. The leads to the inputs should be as direct as possible with a minimum conductor length. Ground paths should have low resistance ...
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I C INTERFACE WRITE MODE Table 10. AD5172 Write Mode Slave address byte Table 11. AD5173 Write Mode 1 AD1 AD0 Slave address byte ...
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AD5172/AD5173 CONTROLLER PROGRAMMING Write Bit Patterns 1 SCL SDA START BY FRAME 1 MASTER SLAVE ADDRESS BYTE 1 SCL AD1 AD0 SDA START BY FRAME 1 ...
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I C-COMPATIBLE, 2-WIRE SERIAL BUS This section describes how the 2-wire, I protocol operates. The master initiates a data transfer by establishing a start condition, which is when a high-to-low transition on the SDA line occurs while SCL is ...
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AD5172/AD5173 Multiple Devices on One Bus (AD5173 Only) Figure 52 shows four AD5173 devices on the same serial bus. Each has a different slave address because the states of the AD0 and AD1 pins are different. This allows each device ...
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OUTLINE DIMENSIONS ORDERING GUIDE Model 1 R (kΩ) AB AD5172BRM2.5 2.5 AD5172BRM2.5-RL7 2.5 2 AD5172BRMZ2.5 2.5 AD5172BRM10 10 AD5172BRM10-RL7 10 2 AD5172BRMZ10 10 2 AD5172BRMZ10-RL7 10 AD5172BRM50 50 2 AD5172BRMZ50 50 2 AD5172BRMZ50-RL7 50 AD5172BRM100 100 2 AD5172BRMZ100 100 2 ...
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AD5172/AD5173 NOTES 2 Purchase of licensed I C components of Analog Devices, Inc., or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I Patent Rights to use these components ...