AD9510-VCO/PCB Analog Devices Inc, AD9510-VCO/PCB Datasheet - Page 45

• Manufacturer Part Number: AD9510-VCO/PCB
• Description: BOARD EVAL CLOCK DISTR 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9510-VCO/PCB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 22. Serial Control Port Timing
Parameter
t
t
t
t
t
t
t
DS
DH
CLK
S
H
HI
LO
SCLK
SDIO
CSB
SCLK
SDIO
CSB
TIMING DIAGRAM FOR TWO SUCCESSIVE CUMMUNICATION CYCLES. NOTE THAT CSB MUST
BE TOGGLED HIGH AND THEN LOW AT THE COMPLETION OF A COMMUNICATION CYCLE.
Description
Setup time between data and rising edge of SCLK
Hold time between data and rising edge of SCLK
Period of the clock
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
16 INSTRUCTION BITS + 8 DATA BITS
t
t
DS
S
COMMUNICATION CYCLE 1
BI N
Figure 52. Use of CSB to Define Communications Cycle
t
HI
t
DH
Figure 51. Serial Control Port Timing—Write
t
CLK
CSB TOGGLE INDICATES
Rev. A | Page 45 of 60
t
LO
CYCLE COMPLETE
BI N + 1
16 INSTRUCTION BITS + 8 DATA BITS
t
PWH
COMMUNICATION CYCLE 2
t
H
AD9510