EVAL-ADV7181BEB Analog Devices Inc, EVAL-ADV7181BEB Datasheet - Page 14

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EVAL-ADV7181BEB

Manufacturer Part Number
EVAL-ADV7181BEB
Description
BOARD EVALUATION FOR ADV7181
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of EVAL-ADV7181BEB

Contents
Evaluation Board
For Use With/related Products
ADV7181
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ADV7181B
Table 8. Manual Mux Settings for All ADCs (SETADC_sw_man_en = 1)
ADC0_sw[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CONFIGURE ADC INPUTS USING
Figure 6. Input Muxing Overview
(ADC_sw_man_en, ADC0_sw,
ADC0 Connected to
No connection
AIN2
No connection
No connection
AIN4
AIN6
No connection
No connection
No connection
AIN1
No connection
No connection
AIN3
AIN5
No connection
No connection
CONFIGURE ADV7181B TO
DECODE VIDEO FORMAT:
MUXING CONTROL BITS
ADC1_sw, ADC2_sw)
ANALOG SIGNALS
SET INSEL[3:0] TO
CONNECTING
TO ADV7181B
YPrPb: 1001
CVBS: 0000
YC: 0110
ADC1_sw[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Rev. B | Page 14 of 100
ADC1 Connected to
No connection
No connection
No connection
No connection
AIN4
AIN6
No connection
No connection
No connection
No connection
No connection
No connection
AIN3
AIN5
No connection
No connection
INSEL[3:0] Input Selection, Address 0x00[3:0]
The INSEL bits allow the user to select the input format. It
configures the standard definition processor core to process
CVBS (Comp), S-Video (Y/C), or Component (YPrPb) format.
Table 9. Standard Definition Processor Format Selection,
INSEL[3:0]
INSEL[3:0]
0000
0110
1001
ADC2_sw[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Composite
Y/C
YPrPb
Video Format
ADC2 Connected to:
No connection
No connection
No connection
No connection
No connection
No connection
AIN6
No connection
No connection
No connection
No connection
No connection
No connection
AIN5
No connection
No connection

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