Z86E4000ZDV Zilog, Z86E4000ZDV Datasheet - Page 27

44 PIN PLCC ADAPTER

Z86E4000ZDV

Manufacturer Part Number
Z86E4000ZDV
Description
44 PIN PLCC ADAPTER
Manufacturer
Zilog
Datasheet

Specifications of Z86E4000ZDV

Convert From (adapter End)
40-Pin DIP ZIF Socket
Convert To (adapter End)
44-PLCC Plug
For Use With/related Products
Zilog Emulators/Programmers
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-2015
Zilog
Port 2 (P27–P20). Port 2 is an 8-bit, bidirectional, CMOS-
compatible I/O port. These eight I/O lines can be config-
ured under software control as an input or output, indepen-
dently. All input buffers are Schmitt-triggered. Bits pro-
grammed as outputs can be globally programmed as
either push-pull or open-drain. Low EMI output buffers can
DS97Z8X0502
Open-Drain
OEN
Out
In
TTL Level Shifter
Z86E40
MCU
Figure 20. Port 2 Configuration
P R E L I M I N A R Y
R
500 K
be globally programmed by the software. When used as an
I/O port, Port 2 can be placed under handshake control.
In Handshake Mode, Port 3 lines P31 and P36 are used as
handshake control lines. The handshake direction is deter-
mined by the configuration (input or output) assigned to bit
7 of Port 2 (Figure 20).
Port 2 (I/O)
Handshake Controls
DAV2 and RDY2
(P31 and P36)
Auto Latch
Z8 4K OTP Microcontroller
PAD
Z86E30/E31/E40
27
1

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