PK-HCS12E128 SofTec Microsystems SRL, PK-HCS12E128 Datasheet - Page 30

no-image

PK-HCS12E128

Manufacturer Part Number
PK-HCS12E128
Description
KIT STARTER USB FOR MC9S12E128
Manufacturer
SofTec Microsystems SRL
Datasheet

Specifications of PK-HCS12E128

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
520-1016
PK-HCS12E128 User's Manual
STOP Assembly Instruction
The BDM peripheral doesn’t work in STOP mode. If, on the Condition Code Register (CCR),
the S bit is set, the STOP instruction will stop all the microcontroller’s activities (and
therefore the BDM peripheral). If, on the other hand, the S bit is reset, the STOP instruction
will be executed as two NOP instructions.
WAIT Assembly Instruction
If the SYSWAI bit in the CLKSEL register has been set, the WAIT instruction will cause a
BDM communication loss. This is because the system clock is suspended in WAIT mode,
therefore stopping the BDM peripheral.
Microcontroller Peripheral Running when Execution is Stopped
When program execution is stopped, some peripherals will still run while others will stop.
4
Which ones stop and which ones don’t depend on the particular peripheral architecture. For
more information, please refer to the microcontroller datasheets.
In particular, to cause the COP and RTI peripherals to stop when you stop program
execution, the RSBCK in the COPCTL register must have been previously set.
Real-Time Memory Update
During program execution, it is possible to view/edit the contents of the Memory window and
Data window in real time (edit operations are only available for RAM locations and
peripheral registers). For example, it is possible to set the periodical refresh of the Memory
window contents by choosing Mode > Periodical from the pop-up menu which appears by
right-clicking on the Memory window.
PLL Usage
The host PC communicates with the microcontroller through the “USB to BDM INTERFACE”
circuitry (which features an asynchronous BDM communication to the MC9S12E128
microcontroller). The BDM communication speed depends on a clock source which, in turn,
is selected by the CLKSW bit in the Status register. If the CLKSW bit is set to 1, the BDM
communication clock source is the microcontroller’s bus frequency; if the CLKSW bit is set
to 0, the BDM communication clock source is a constant clock source (in the case of the
MC9S12E128, half the frequency of the external oscillator).
Page 29

Related parts for PK-HCS12E128