Z8F6421PM00ZEM Zilog, Z8F6421PM00ZEM Datasheet - Page 3
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Z8F6421PM00ZEM
Manufacturer Part Number
Z8F6421PM00ZEM
Description
KIT ICE Z8 ENCORE 64K 40DIP
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
In-Circuit Emulator Systemr
Specifications of Z8F6421PM00ZEM
Contents
Emulator Board, Cables, Software and Documentation
For Use With/related Products
Z8 Encore! 40-PDIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3393
Table 2. Z8 Encore! XP F64XX Series Errata Date Coded Prior to 0334 (Continued)
UP006010-0508
Sl
No. Summary
4
5
6
7
8
9
10
UART address com-
pare function does
not work.
UART baud rate
generator cannot be
used as simple
timer.
Unlocking the Flash
controller allows pro-
gram and erase
operations on all
Flash pages.
Setting bits in the
Flash sector protect
register to 1 does
not lock sectors.
Watchdog Timer
cannot be disabled
in STOP mode.
Watchdog Timer
oscillator frequency
is out of specifica-
tion.
Operating currents.
Description
Setting bit 7 (MPMD[1]) of the UART control 1 register to 1 does not produce
the desired effect of enabling the UART address compare and associated
interrupt functionality.
Workaround
Leave MPMD[1] in its reset state of 0.
Setting BRGCTL (bit 2 of the UART Control 1 register) to 1 when the UART
receiver is disabled does not enable UART baud rate generator interrupt.
Thus, the UART baud rate generator cannot be used as a simple timer.
Workaround
Use one of the four standard timers or the baud rate generators in the SPI or
I
During the Flash controller unlock sequence, the specification indicates that a
second write to the Flash Page Select register is required (step 5 of the
sequence) to unlock the Flash controller for the selected Flash page. The
Flash controller unlocks for all Flash pages once the step 1 to step 4 of the
unlock sequence are complete.
Workaround
None
Writing bits in the Flash sector protect register to 1 fails to prevent program
and erase operations on the selected Flash memory sector.
Workaround
None
The Watchdog Timer and its associated internal RC oscillator cannot be dis-
abled in STOP mode.
Workaround
None
The typical Watchdog Timer internal oscillator frequency is 50 kHz rather than
the currently specified 10 kHz. This frequency can result in WDT time-out val-
ues that are less than expected.
Workaround
Increase the WDT reload value by a factor of 5 to compensate for the fre-
quency error.
Operating currents in the various mode (NORMAL, HALT, and STOP) may be
higher than typical values.
Workaround
None
2
C blocks to perform the desired timing operations.
Errata for Z8 Encore! XP
®
F64XX Series
Page 3 of 5