KS8695P-EVAL Micrel Inc, KS8695P-EVAL Datasheet - Page 33

no-image

KS8695P-EVAL

Manufacturer Part Number
KS8695P-EVAL
Description
BOARD EVAL EXPERIMENT KS8695P
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8695P-EVAL

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
576-1002
KS8695P
Address Range
0x0000 – 0x0004
0x2000 – 0x2224
0x4000 – 0x4040
0x6000 – 0x60FC
0x8000 – 0x80FC
0xA000 – 0xA0FC
0xE000 – 0xA0FC
0xE200 – 0xE234
0xE400 – 0xE410
0xE600 – 0xE608
0xE800 – 0xE850
0xEA00 – 0xEA18
M9999-081805
Address Map and Register Description
Memory Map
Upon power up, the KS8695P memory map is configured as shown below.
Memory Map Example
The default base address for the KS8695P system configuration registers is 0x03ff0000. After power up, the user is free to re-
map the memory for their specific application. The following is an example of the memory space remapped for operation.
Register Description
The KS8695P system configuration registers (SCRs) are located in a block of 64KB in the host memory address space.
After power up and initialization, the user can remap the SCRs to a desired offset. The SCRs are 32 bits wide. They are 32
bit word-aligned and must be accessed using word instructions.
The AHB-PCI bridge configuration registers are also included in the SCRs. A subset of the AHB-PCI bridge configuration
registers is also accessible to an external PCI host when the KS8695P is configured in PCI guest mode. Refer to the detailed
Register Description document for additional information, including bit definitions. If you don’t have this document, contact
your local Micrel Field Application Engineer or salesperson.
0x03FF0000-0x03FFFFFF
0x03FF0000-0x03FFFFFF
0x03E00000-0x03FEFFFF
0x02C00000-0x031FFFFF
0x02000000-0x03FEFFFF
0x00000000-0x01FFFFFF
0x02800000-0x02BFFFFF
0x03200000-0x036FFFFF
0x02000000-0x027FFFFF
0x00000000-0x01FFFFFF
Address Range
Address Range
Register Type
System Registers
PCI-AHB Bridge Configuration
Memory Controller Interface
WAN DMA
LAN DMA
Reserved
UART Registers
Interrupt Controller
Timer Registers
General Purpose I/O
Switch Engine Configuration
Miscellaneous Registers
Region
64KB
32MB
32MB
Region
64KB
2MB
5MB
6MB
4MB
Description
KS8695P System Configuration Register Space
Not Configured
Flash Bank 0
Description
KS8695P System Configuration Register Space
Disabled, Not Used
Space (External I/O)
Reserved FLASH Space, Not Used
FLASH
8MB
32MB
33
Register Type
System Configuration
External I/O Bank 2
External I/O Bank 1
External I/O Bank 0
Not Used
Flash Bank 0 – 4MB
Not Used
SDRAM 16MB
Disabled, Not Used
SDRAM
Address Range
0x03FFFFFF – 0x03FEFFFF
0x03FEFFFF – 0x039FFFFF
0x039FFFFF – 0x035FFFFF
0x035FFFFF – 0x031FFFFF
0x031FFFFF – 0x02FFFFFF
0x02FFFFFF – 0x027FFFFF
0x027FFFFF – 0x00FFFFFF
0x00FFFFFF – 0x00000000
August 2005
Micrel

Related parts for KS8695P-EVAL