KS8695P-MDP-EVAL Micrel Inc, KS8695P-MDP-EVAL Datasheet - Page 19

• Manufacturer Part Number: KS8695P-MDP-EVAL
• Description: EVAL KIT EXPERIMENTAL KS8695PMPD
• Manufacturer: Micrel Inc

Specifications of KS8695P-MDP-EVAL

• Lead Free Status / RoHS Status: Not applicable / Not applicable

Following pins have second function as factory test of chip.
Configuration
Chip Test Enable
Reset
The KS8695P has a single reset input that can be driven by a system reset circuit or a simple power on reset circuit. The
KS8695P also features a reset output (WRSTO) that can be used to reset other devices in the system. WRSTO can be
configured as either an active high reset or an active low reset through a strap-in option on pin U17, as shown in Table 1.
The KS8695P also has a built in watchdog timer. When the watchdog timer is programmed and the timer setting expires,
the KS8695P resets itself and also asserts WRSTO to reset the other devices in the system. Figure 4 shows a typical
system using the KS8695P WRSTO as the system reset.
Reset Circuit Diagram
At power-on-reset, R, C,and D1 provide the necessary ramp rise time to reset the Micrel device. The reset out from
CPU/FPGA provides warm reset after power up.
Micrel, Inc.
May 2006
Figure 5. Recommended Circuit for Interfacing with CPU/FPGA Reset
Pin Name
TESTEN
ERWEN0/TESTACK
ERWEN1/TESTREQB
ERWEN2/TESTREQA
ERWEN3/TICTESTTENN
UCTSN/BISTEN
UDCDN/SCANEN
URIN/TSTRST
TEST1
TEST2
KS8695P
Figure 4. Example of a Reset Circuit
RST
Table 2. Configuration Pins
D1
10µF
VCC
C
Pin #
F17
M17
N17
P17
R17
M14
L15
L14
M4
F4
R
10k
19
D2
RST_OUT_n
Setting
‘0’ = normal operation
‘1’ = factory reserved. Used for factory test of
chip and affects all signals listed in this table.
CPU/FPGA
M9999-051806
KS8695P