KS8993F-EVAL Micrel Inc, KS8993F-EVAL Datasheet - Page 65

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KS8993F-EVAL

Manufacturer Part Number
KS8993F-EVAL
Description
EVAL KIT EXPERIMENTAL KS8993F
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8993F-EVAL

Lead Free Status / RoHS Status
Not applicable / Not applicable
4.3
Register 64 (0x40): PHY Address
Register 65 (0x41): Center Side Status
Micrel, Inc.
Bit
7–5
4
3
2
1
0
Bit
7
6
5–3
2
1
0
May 2006
Media Converter Registers
Name
Reserved
Addr4
Addr3
Addr2
Addr1
Addr0
Name
BUSY
Vendor mode
Reserved
Option b
Option a
Request
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
RO
R/W
R/W
RO
Description
N/A
For Center side MC mode, these bits are port 1’s PHY address.
For Terminal side MC mode, these bits are fixed at 0x01h for port 1’s
PHY address.
Notes
port
0x02h.
Description
1 = indicate MC loop back mode inprogress, or receive reply
1 = non special vendor mode
0 = special vendor mode (compare My & LNK Partner Vendor
Reserved
1 = clear status bits S6 to S10 to zero on Terminal MC side
0 = normal operation – supporting option b
1 = disable “Indicate Center MC Condition” frame
0 = enable “Indicate Center MC condition” frame
1 = indicate change of status/value in registers # 0x50h, 0x51h,
0x58h, 0x59h, 0x5Dh, 0x5Eh, 0x5Fh. This bit is self-cleared after a
read.
0 = exclude the above situations
0 = exclude the above situations
0 0000 : N/A
0 0001 : Port 1’s PHY address is 0x01h
0 0011 : Port 1’s PHY address is 0x03h
other values : N/A
(1) If pins [MCHS,MCCS] = [0,1], a write to these bits with port 1’s
(2) If pins [MCHS,MCCS] = [0,1], the MIIM bus can only access
(3) If pins [MCHS, MCCS] != [0,1], the MIIM bus will access port 1
Info = 0x009099h)
frame/timeout is pending
PHY address is required to enable port 1 and start the Center
side MC.
using PHY address 0x01h and port 2 using PHY address
1.
65
hbwhelp@micrel.com
or (408) 955-1690
M9999-052206
KS8993F/FL
Defaul
t
000
0
0
0
0
1
Defaul
t
0
0
000
0
0
0

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