EVAL-ADM1031EB ON Semiconductor, EVAL-ADM1031EB Datasheet - Page 7
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EVAL-ADM1031EB
Manufacturer Part Number
EVAL-ADM1031EB
Description
BOARD EVAL FOR ADM1031
Manufacturer
ON Semiconductor
Type
Temperature Sensorr
Datasheet
1.ADM1031ARQ.pdf
(30 pages)
Specifications of EVAL-ADM1031EB
Contents
Evaluation Board
For Use With/related Products
ADM1031
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Functional Description
fan controller for microprocessor−based systems. The
device communicates with the system via a serial System
Management Bus (SMBus). The serial bus controller has a
hardwired address pin for device selection (Pin 13), a serial
data line for reading and writing addresses and data (Pin 15),
and an input line for the serial clock (Pin 16). All control and
programming functions of the ADM1031 are performed
over the serial bus. The device also supports Alert Response
Address (ARA).
Internal Registers
registers are given below. For more detailed information on
the function of each register, see Table 14 through Table 29.
Configuration Register
the device.
Address Pointer Register
other internal registers. When writing to the ADM1031, the
first byte of data is always a register address, which is written
to the address pointer register.
Status Registers
Value and Limit Registers
speed measurements, along with their limit values.
Fan Speed Configuration Register
each fan.
Offset Registers
be offset by a 5−bit twos complement value written to these
registers. These values are automatically added to the
temperature values (or subtracted from if negative). This
allows the systems designer to optimize the system if
required, by adding or subtracting up to 15°C from a
temperature reading.
Fan Characteristics Registers
frequency, and speed range for the fans used.
THERM Limit Registers
THERM is asserted.
T
minimum temperature value below which the fan does not
run when the device is in automatic fan speed control mode.
These registers also hold the temperature range value that
MIN
The ADM1031 is a temperature monitor and dual PWM
Brief descriptions of the ADM1031’s principal internal
This register controls and configures various functions on
This register contains the address that selects one of the
These registers provide status of each limit comparison.
Theses registers store the results of temperature and fan
This register is used to program the PWM duty cycle for
These registers allow the temperature channel readings to
These registers are used to select the spin−up time, PWM
These registers contain the temperature values at which
These registers are read/write registers that hold the
/T
RANGE
Registers
http://onsemi.com
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defines the range over which auto fan control is provided,
and hence determines the temperature at which the fan is run
at full speed.
Serial Bus Interface
The ADM1031 is connected to this bus as a slave device,
under the control of a master device, for example, the 810
chipset.
device is powered up, it does so with a default serial bus
address. The five MSBs of the address are set to 01011; the
two LSBs are determined by the logical state of Pin 13
(ADD). This is a three−state input that can be grounded,
connected to V
addresses. The state of the ADD pin is only sampled at
powerup, so changing ADD with power on has no effect
until the device is powered off, then on again.
0101110. The facility to make hardwired changes at the
ADD pin allows the user to avoid conflicts with other
devices sharing the same serial bus; for example, if more
than one ADM1031 is used in a system.
Serial Bus Protocol
Table 1. ADD Pin Truth Table
ADD Pin
GND
No Connect
V
Control of the ADM1031 is carried out via the SMBus.
The ADM1031 has a 7−bit serial bus address. When the
If ADD is left open−circuit, then the default address is
CC
1. The master initiates data transfer by establishing a
2. Data is sent over the serial bus in sequences of
START condition, defined as a high−to−low
transition on the serial data line SDA while the
serial clock line SCL remains high. This indicates
that an address/data stream follows. All slave
peripherals connected to the serial bus respond to
the START condition, and shift in the next eight
bits, consisting of a 7−bit address (MSB first) plus
an R/W bit that determines the direction of the
data transfer, that is, whether data is written to or
read from the slave device.
The peripheral whose address corresponds to the
transmitted address responds by pulling the data
line low during the low period before the ninth
clock pulse, known as the Acknowledge Bit. All
other devices on the bus now remain idle while the
selected device waits for data to be read from or
written to it. If the R/W bit is a 0, then the master
writes to the slave device. If the R/W bit is a 1,
then the master reads from the slave device.
nine clock pulses, eight bits of data, followed by
an acknowledge bit from the slave device.
Transitions on the data line must occur during the
low period of the clock signal and remain stable
CC
, or left open−circuit to give three different
A1
0
1
0
A0
0
0
1