SW500011 Microchip Technology, SW500011 Datasheet - Page 113
SW500011
Manufacturer Part Number
SW500011
Description
HI-TECH X PRO FOR PIC32
Manufacturer
Microchip Technology
Type
Compilerr
Series
PIC32r
Datasheet
1.SW500011.pdf
(440 pages)
Specifications of SW500011
No. Of User Licenses
1
Supported Families
PIC32
Core Architecture
PIC
Supported Hosts
Windows XP, Vista, Linux, Mac OS X
Software Edition
Professional
Kit Contents
Software And Docs
Tool Type
Compiler
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
PIC32 Series
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
032
778-1007
778-1007
778-1007
778-1007
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Macro Assembler
4.3 HI-TECH C Assembly Language
The source language accepted by the macro assembler, ASPIC32 , is described below. All opcode
mnemonics and operand syntax are strictly PIC32 assembly language. Additional mnemonics and
assembler directives are documented in this section.
4.3.1 Pre-defined Macros
The PIC32 assembler features a number of convenient in-built macro instructions for both MIPS32r2
and MIPS16e instruction set architectures. The following sections describe these in more detail.
Note that these descriptions use the same notation used in the official MIPS documentation.
4.3.1.1 MIPS32r2 In-built Macro Instructions
LI rt, immediate Loads the immediate operand into the register rt using various combina-
LI rd rt immediate Loads the immediate operand into the register rd using various combi-
MOVE rd, rs A synonym of OR rd, rs, zero.
NEG rd, rt A synonym of SUB rd, zero, rt.
NEGU rd, rt A synonym of SUBU rd, zero, rt.
NOT rd, rt A synonym of NOR rd, zero, rt.
4.3.1.2 MIPS16E In-built Macro Instructions
ADDIUPC rx, immediate A synonym of ADDIU rx, pc, immediate.
LI32 rx, immediate Loads the 32 bit immediate operand into the register rx. Literal con-
LWPC rx, offset A synonym of LW rx, offset(pc).
tions of LUI, ORI and ADDIU instructions where appropriate.
nations of LUI, ORI and ADDIU instructions where appropriate. If two instructions are required
then rt is used as a temporary register to store an intermediate result.
stant immediate operands are loaded into the register using various combinations of LI, SLL,
ADDIU and NEG instructions. For immediate operands which cannot be determined until link
time, the appropriate value is stored in a small in situ table and loaded into rx with a LW
instruction relative to the pc.
HI-TECH C Assembly Language
113
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